Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b01928a4 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'sirf/dt' into next/dt 



From Barry Song:
Some missed dt nodes for sirf dts for 3.13. Among them:
 - add missed chhifbg node in prima2 and atlas6 dts
 - add missed cell, cs and dma channel for SPI nodes
 - add missed graphics2d iobg in atlas6 dts
 - add missed address-cells and size-cells for prima2 I2C
 - add missed memcontrol-monitor node in prima2 and atlas6 dts

* sirf/dt:
  ARM: dts: sirf: add missed address-cells and size-cells for prima2 I2C
  ARM: dts: sirf: add missed cell, cs and dma channel for SPI nodes
  ARM: dts: sirf: add missed graphics2d iobg in atlas6 dts
  ARM: dts: sirf: add missed chhifbg node in prima2 and atlas6 dts
  ARM: dts: sirf: add missed memcontrol-monitor node in prima2 and atlas6 dts

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 5f55c317 7a54a4ba

arch/arm/boot/dts/atlas6.dtsi

+32 −1
Original line number Diff line number Diff line
@@ -65,6 +65,11 @@ 
				compatible = "sirf,prima2-rsc";

				reg = <0x88020000 0x1000>;

			};



			cphifbg@88030000 {

				compatible = "sirf,prima2-cphifbg";

				reg = <0x88030000 0x1000>;

			};

		};



		mem-iobg {
@@ -75,10 +80,17 @@ 


			memory-controller@90000000 {

				compatible = "sirf,prima2-memc";

				reg = <0x90000000 0x10000>;

				reg = <0x90000000 0x2000>;

				interrupts = <27>;

				clocks = <&clks 5>;

			};



			memc-monitor {

				compatible = "sirf,prima2-memcmon";

				reg = <0x90002000 0x200>;

				interrupts = <4>;

				clocks = <&clks 32>;

			};

		};



		disp-iobg {
@@ -120,6 +132,20 @@ 
			};

		};



		graphics2d-iobg {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0xa0000000 0xa0000000 0x8000000>;



			ble@a0000000 {

				compatible = "sirf,atlas6-ble";

				reg = <0xa0000000 0x2000>;

				interrupts = <5>;

				clocks = <&clks 33>;

			};

		};



		dsp-iobg {

			compatible = "simple-bus";

			#address-cells = <1>;
@@ -271,6 +297,11 @@ 
				compatible = "sirf,prima2-spi";

				reg = <0xb0170000 0x10000>;

				interrupts = <16>;

				sirf,spi-num-chipselects = <1>;

				sirf,spi-dma-rx-channel = <12>;

				sirf,spi-dma-tx-channel = <13>;

				#address-cells = <1>;

				#size-cells = <0>;

				clocks = <&clks 20>;

				status = "disabled";

			};

arch/arm/boot/dts/prima2.dtsi

+29 −1
Original line number Diff line number Diff line
@@ -76,6 +76,11 @@ 
				compatible = "sirf,prima2-rsc";

				reg = <0x88020000 0x1000>;

			};



			cphifbg@88030000 {

				compatible = "sirf,prima2-cphifbg";

				reg = <0x88030000 0x1000>;

			};

		};



		mem-iobg {
@@ -86,10 +91,17 @@ 


			memory-controller@90000000 {

				compatible = "sirf,prima2-memc";

				reg = <0x90000000 0x10000>;

				reg = <0x90000000 0x2000>;

				interrupts = <27>;

				clocks = <&clks 5>;

			};



			memc-monitor {

				compatible = "sirf,prima2-memcmon";

				reg = <0x90002000 0x200>;

				interrupts = <4>;

				clocks = <&clks 32>;

			};

		};



		disp-iobg {
@@ -287,7 +299,13 @@ 
				compatible = "sirf,prima2-spi";

				reg = <0xb00d0000 0x10000>;

				interrupts = <15>;

				sirf,spi-num-chipselects = <1>;

				sirf,spi-dma-rx-channel = <25>;

				sirf,spi-dma-tx-channel = <20>;

				#address-cells = <1>;

				#size-cells = <0>;

				clocks = <&clks 19>;

				status = "disabled";

			};



			spi1: spi@b0170000 {
@@ -295,7 +313,13 @@ 
				compatible = "sirf,prima2-spi";

				reg = <0xb0170000 0x10000>;

				interrupts = <16>;

				sirf,spi-num-chipselects = <1>;

				sirf,spi-dma-rx-channel = <12>;

				sirf,spi-dma-tx-channel = <13>;

				#address-cells = <1>;

				#size-cells = <0>;

				clocks = <&clks 20>;

				status = "disabled";

			};



			i2c0: i2c@b00e0000 {
@@ -304,6 +328,8 @@ 
				reg = <0xb00e0000 0x10000>;

				interrupts = <24>;

				clocks = <&clks 17>;

				#address-cells = <1>;

				#size-cells = <0>;

			};



			i2c1: i2c@b00f0000 {
@@ -312,6 +338,8 @@ 
				reg = <0xb00f0000 0x10000>;

				interrupts = <25>;

				clocks = <&clks 18>;

				#address-cells = <1>;

				#size-cells = <0>;

			};



			tsc@b0110000 {