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Commit ae7d9d32 authored by Carlo Caione's avatar Carlo Caione Committed by Thomas Gleixner
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ARM: sun7i/sun6i: irqchip: Update the documentation



Add documentation for NMI irqchip.

Signed-off-by: default avatarCarlo Caione <carlo@caione.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-sunxi@googlegroups.com
Cc: mark.rutland@arm.com
Cc: hdegoede@redhat.com
Acked-by: default avatar <maxime.ripard@free-electrons.com>
Link: http://lkml.kernel.org/r/1395256879-8475-4-git-send-email-carlo@caione.org


Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 8ff973a2
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Allwinner Sunxi NMI Controller
==============================

Required properties:

- compatible : should be "allwinner,sun7i-a20-sc-nmi" or
  "allwinner,sun6i-a31-sc-nmi"
- reg : Specifies base physical address and size of the registers.
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
  interrupt source. The value shall be 2. The first cell is the IRQ number, the
  second cell the trigger type as defined in interrupt.txt in this directory.
- interrupt-parent: Specifies the parent interrupt controller.
- interrupts: Specifies the interrupt line (NMI) which is handled by
  the interrupt controller in the parent controller's notation. This value
  shall be the NMI.

Example:

sc-nmi-intc@01c00030 {
	compatible = "allwinner,sun7i-a20-sc-nmi";
	interrupt-controller;
	#interrupt-cells = <2>;
	reg = <0x01c00030 0x0c>;
	interrupt-parent = <&gic>;
	interrupts = <0 0 4>;
};