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Commit ae45b1c6 authored by wanzongshun's avatar wanzongshun Committed by Russell King
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ARM: 5634/1: Add static setting cpu frequence for w90p910 platform 



Add static setting cpu frequence for w90p910 platform.

Signed-off-by: default avatarWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 897bd6a3

arch/arm/mach-w90x900/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 
# Object file lists.



obj-y				:= irq.o time.o mfp-w90p910.o gpio.o clock.o



obj-y				+= clksel.o

# W90X900 CPU support files



obj-$(CONFIG_CPU_W90P910)	+= w90p910.o

arch/arm/mach-w90x900/clksel.c

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/*

 * linux/arch/arm/mach-w90x900/clksel.c

 *

 * Copyright (c) 2008 Nuvoton technology corporation

 *

 * Wan ZongShun <mcuos.com@gmail.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation;version 2 of the License.

 */



#include <linux/module.h>

#include <linux/kernel.h>

#include <linux/device.h>

#include <linux/list.h>

#include <linux/errno.h>

#include <linux/err.h>

#include <linux/string.h>

#include <linux/clk.h>

#include <linux/mutex.h>

#include <linux/io.h>



#include <mach/hardware.h>

#include <mach/regs-clock.h>



#define PLL0		0x00

#define PLL1		0x01

#define OTHER		0x02

#define EXT		0x03

#define MSOFFSET	0x0C

#define ATAOFFSET	0x0a

#define LCDOFFSET	0x06

#define AUDOFFSET	0x04

#define CPUOFFSET	0x00



static DEFINE_MUTEX(clksel_sem);



static void clock_source_select(const char *dev_id, unsigned int clkval)

{

	unsigned int clksel, offset;



	clksel = __raw_readl(REG_CLKSEL);



	if (strcmp(dev_id, "w90p910-ms") == 0)

		offset = MSOFFSET;

	else if (strcmp(dev_id, "w90p910-atapi") == 0)

		offset = ATAOFFSET;

	else if (strcmp(dev_id, "w90p910-lcd") == 0)

		offset = LCDOFFSET;

	else if (strcmp(dev_id, "w90p910-audio") == 0)

		offset = AUDOFFSET;

	else

		offset = CPUOFFSET;



	clksel &= ~(0x03 << offset);

	clksel |= (clkval << offset);



	__raw_writel(clksel, REG_CLKSEL);

}



void w90p910_clock_source(struct device *dev, unsigned char *src)

{

	unsigned int clkval;

	const char *dev_id;



	BUG_ON(!src);

	clkval = 0;



	mutex_lock(&clksel_sem);



	if (dev)

		dev_id = dev_name(dev);

	else

		dev_id = "cpufreq";



	if (strcmp(src, "pll0") == 0)

		clkval = PLL0;

	else if (strcmp(src, "pll1") == 0)

		clkval = PLL1;

	else if (strcmp(src, "ext") == 0)

		clkval = EXT;

	else if (strcmp(src, "oth") == 0)

		clkval = OTHER;



	clock_source_select(dev_id, clkval);



	mutex_unlock(&clksel_sem);

}

EXPORT_SYMBOL(w90p910_clock_source);

arch/arm/mach-w90x900/cpu.h

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@@ -45,6 +45,7 @@ extern void w90p910_init_clocks(void); 
extern void w90p910_map_io(struct map_desc *mach_desc, int size);

extern struct platform_device w90p910_serial_device;

extern struct sys_timer w90x900_timer;

extern void w90p910_clock_source(struct device *dev, unsigned char *src);



#define W90X900_8250PORT(name)					\

{								\

arch/arm/mach-w90x900/include/mach/regs-clock.h

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@@ -28,4 +28,26 @@ 
#define REG_CLKEN1	(CLK_BA + 0x24)

#define REG_CLKDIV1	(CLK_BA + 0x28)



/* Define PLL freq setting */

#define PLL_DISABLE		0x12B63

#define	PLL_66MHZ		0x2B63

#define	PLL_100MHZ		0x4F64

#define PLL_120MHZ		0x4F63

#define	PLL_166MHZ		0x4124

#define	PLL_200MHZ		0x4F24



/* Define AHB:CPUFREQ ratio */

#define	AHB_CPUCLK_1_1		0x00

#define	AHB_CPUCLK_1_2		0x01

#define	AHB_CPUCLK_1_4		0x02

#define	AHB_CPUCLK_1_8		0x03



/* Define APB:AHB ratio */

#define APB_AHB_1_2		0x01

#define APB_AHB_1_4		0x02

#define APB_AHB_1_8		0x03



/* Define clock skew */

#define DEFAULTSKEW		0x48



#endif /*  __ASM_ARCH_REGS_CLOCK_H */

arch/arm/mach-w90x900/include/mach/regs-ebi.h

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/*

 * arch/arm/mach-w90x900/include/mach/regs-ebi.h

 *

 * Copyright (c) 2009 Nuvoton technology corporation.

 *

 * Wan ZongShun <mcuos.com@gmail.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation;version 2 of the License.

 *

 */



#ifndef __ASM_ARCH_REGS_EBI_H

#define __ASM_ARCH_REGS_EBI_H



/* EBI Control Registers */



#define EBI_BA		W90X900_VA_EBI

#define REG_EBICON	(EBI_BA + 0x00)

#define REG_ROMCON	(EBI_BA + 0x04)

#define REG_SDCONF0	(EBI_BA + 0x08)

#define REG_SDCONF1	(EBI_BA + 0x0C)

#define REG_SDTIME0	(EBI_BA + 0x10)

#define REG_SDTIME1	(EBI_BA + 0x14)

#define REG_EXT0CON	(EBI_BA + 0x18)

#define REG_EXT1CON	(EBI_BA + 0x1C)

#define REG_EXT2CON	(EBI_BA + 0x20)

#define REG_EXT3CON	(EBI_BA + 0x24)

#define REG_EXT4CON	(EBI_BA + 0x28)

#define REG_CKSKEW	(EBI_BA + 0x2C)



#endif /*  __ASM_ARCH_REGS_EBI_H */