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Commit addf888c authored by Mike Turquette's avatar Mike Turquette Committed by Paul Walmsley
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ARM: OMAP3+: dpll: use DPLL's round_rate when setting rate



omap3_noncore_dpll_set_rate uses omap2_dpll_round_rate explicitly.  Instead
use the struct clk pointer's round_rate function to allow for DPLL's with
special needs.

An example of a clock that requires this is DPLL_ABE on OMAP4 which
can have a 4x multiplier on top of the usual MN dividers depending on
register settings.  This requires a special round_rate function that
might yield a rate different from the initial target.

Signed-off-by: default avatarMike Turquette <mturquette@ti.com>
Signed-off-by: default avatarJon Hunter <jon-hunter@ti.com>
[paul@pwsan.com: split rate assignment portion into a separate patch]
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent a1900f2e
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+1 −1
Original line number Diff line number Diff line
@@ -455,7 +455,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
			new_parent = dd->clk_bypass;
	} else {
		if (dd->last_rounded_rate != rate)
			omap2_dpll_round_rate(clk, rate);
			clk->round_rate(clk, rate);

		if (dd->last_rounded_rate == 0)
			return -EINVAL;