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Commit adde42b5 authored by Alex Raimondi's avatar Alex Raimondi Committed by Haavard Skinnemoen
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avr32: Allow reserving multiple pins at once 



at32_reserve_pin now takes an u32 bitmask rather than a single pin.
This allows to reserve multiple pins at once.

Remove (undocumented) SDCS (pin PE26) from reservation in board
setup code.

Signed-off-by: default avatarAlex Raimondi <raimondi@miromico.ch>
Signed-off-by: default avatarHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
parent 45f92691

arch/avr32/boards/atstk1000/atstk1002.c

+1 −17
Original line number Diff line number Diff line
@@ -287,23 +287,7 @@ static int __init atstk1002_init(void) 
	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the

	 * SDRAM-specific pins so that nobody messes with them.

	 */

	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/

	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/

	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/

	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/

	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/

	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/

	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/

	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/

	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/

	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/

	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/

	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/

	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/

	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/

	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/

	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/

	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/

	at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);



#ifdef CONFIG_BOARD_ATSTK1006

	smc_set_timing(&nand_config, &nand_timing);

arch/avr32/boards/atstk1000/atstk1003.c

+1 −17
Original line number Diff line number Diff line
@@ -131,23 +131,7 @@ static int __init atstk1003_init(void) 
	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the

	 * SDRAM-specific pins so that nobody messes with them.

	 */

	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/

	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/

	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/

	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/

	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/

	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/

	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/

	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/

	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/

	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/

	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/

	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/

	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/

	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/

	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/

	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/

	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/

	at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);



#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM

	at32_add_device_usart(1);

arch/avr32/boards/favr-32/setup.c

+1 −17
Original line number Diff line number Diff line
@@ -307,23 +307,7 @@ static int __init favr32_init(void) 
	 * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific

	 * pins so that nobody messes with them.

	 */

	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/

	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/

	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/

	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/

	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/

	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/

	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/

	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/

	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/

	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/

	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/

	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/

	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/

	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/

	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/

	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/

	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/

	at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);



	at32_select_gpio(GPIO_PIN_PB(3), 0);	/* IRQ from ADS7843 */

arch/avr32/mach-at32ap/include/mach/at32ap700x.h

+3 −0
Original line number Diff line number Diff line
@@ -211,4 +211,7 @@ 


#define ATMEL_LCDC_ALT_15BIT	(ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)



/* Bitmask for all EBI data (D16..D31) pins on port E */

#define ATMEL_EBI_PE_DATA_ALL  (0x0000FFFF)



#endif /* __ASM_ARCH_AT32AP700X_H__ */

arch/avr32/mach-at32ap/include/mach/portmux.h

+1 −1
Original line number Diff line number Diff line
@@ -25,6 +25,6 @@ void at32_select_periph(unsigned int port, unsigned int pin, 
			unsigned int periph, unsigned long flags);

void at32_select_gpio(unsigned int pin, unsigned long flags);

void at32_deselect_pin(unsigned int pin);

void at32_reserve_pin(unsigned int pin);

void at32_reserve_pin(unsigned int port, u32 pin_mask);



#endif /* __ASM_ARCH_PORTMUX_H__ */