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Commit acf04e63 authored by Oder Chiou's avatar Oder Chiou Committed by Mark Brown
Browse files

ASoC: rt5640: Remove the unused or incorrect setting of clock source 



The patch removes the unused or incorrect setting of clock source.

Signed-off-by: default avatarOder Chiou <oder_chiou@realtek.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 218a3f96

sound/soc/codecs/rt5640.c

+1 −7
Original line number Diff line number Diff line
@@ -487,7 +487,7 @@ static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, 


	val = snd_soc_read(source->codec, RT5640_GLB_CLK);

	val &= RT5640_SCLK_SRC_MASK;

	if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)

	if (val == RT5640_SCLK_SRC_PLL1)

		return 1;

	else

		return 0;
@@ -1694,12 +1694,6 @@ static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai, 
	case RT5640_SCLK_S_PLL1:

		reg_val |= RT5640_SCLK_SRC_PLL1;

		break;

	case RT5640_SCLK_S_PLL1_TK:

		reg_val |= RT5640_SCLK_SRC_PLL1T;

		break;

	case RT5640_SCLK_S_RCCLK:

		reg_val |= RT5640_SCLK_SRC_RCCLK;

		break;

	default:

		dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);

		return -EINVAL;

sound/soc/codecs/rt5640.h

+0 −2
Original line number Diff line number Diff line
@@ -976,8 +976,6 @@ 
#define RT5640_SCLK_SRC_SFT			14

#define RT5640_SCLK_SRC_MCLK			(0x0 << 14)

#define RT5640_SCLK_SRC_PLL1			(0x1 << 14)

#define RT5640_SCLK_SRC_PLL1T			(0x2 << 14)

#define RT5640_SCLK_SRC_RCCLK			(0x3 << 14) /* 15MHz */

#define RT5640_PLL1_SRC_MASK			(0x3 << 12)

#define RT5640_PLL1_SRC_SFT			12

#define RT5640_PLL1_SRC_MCLK			(0x0 << 12)