Loading arch/arm/boot/dts/qcom/msm8909.dtsi +23 −1 Original line number Diff line number Diff line Loading @@ -1706,6 +1706,21 @@ qcom,sleep-status-mask= <0x80000>; }; }; &gdsc_venus { clock-names = "bus_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_venus0_axi_clk>, <&clock_gcc clk_gcc_venus0_vcodec0_clk>; status = "okay"; }; &gdsc_venus_core0 { qcom,support-hw-trigger; clock-names = "core0_clk"; clocks = <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>; status = "okay"; }; &gdsc_mdss { clock-names = "core_clk", "bus_clk"; clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>, Loading @@ -1713,9 +1728,16 @@ status = "okay"; }; &gdsc_vfe { clock-names = "core_clk", "bus_clk", "csi_clk"; clocks = <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_vfe_axi_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>; status = "okay"; }; &gdsc_oxili_gx { clock-names = "core_clk"; clocks = <&clock_gcc clk_gcc_oxili_gfx3d_clk>; status = "okay"; }; Loading
arch/arm/boot/dts/qcom/msm8909.dtsi +23 −1 Original line number Diff line number Diff line Loading @@ -1706,6 +1706,21 @@ qcom,sleep-status-mask= <0x80000>; }; }; &gdsc_venus { clock-names = "bus_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_venus0_axi_clk>, <&clock_gcc clk_gcc_venus0_vcodec0_clk>; status = "okay"; }; &gdsc_venus_core0 { qcom,support-hw-trigger; clock-names = "core0_clk"; clocks = <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>; status = "okay"; }; &gdsc_mdss { clock-names = "core_clk", "bus_clk"; clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>, Loading @@ -1713,9 +1728,16 @@ status = "okay"; }; &gdsc_vfe { clock-names = "core_clk", "bus_clk", "csi_clk"; clocks = <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_vfe_axi_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>; status = "okay"; }; &gdsc_oxili_gx { clock-names = "core_clk"; clocks = <&clock_gcc clk_gcc_oxili_gfx3d_clk>; status = "okay"; };