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Commit ac668088 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Disable RC6 on Ironlake 



The automatic powersaving feature is once again causing havoc, with 100%
reliable hangs on boot and resume on affected machines.

Reported-by: default avatarFrancesco Allertsen <fallertsen@gmail.com>
Reported-by: default avatarGui Rui <chaos.proton@gmail.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=28582


Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 72389a33

drivers/gpu/drm/i915/i915_drv.c

+4 −1
Original line number Diff line number Diff line
@@ -46,6 +46,9 @@ module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); 
unsigned int i915_powersave = 1;

module_param_named(powersave, i915_powersave, int, 0600);



unsigned int i915_enable_rc6 = 0;

module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600);



unsigned int i915_lvds_downclock = 0;

module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
@@ -360,7 +363,7 @@ static int i915_drm_thaw(struct drm_device *dev) 
		/* Resume the modeset for every activated CRTC */

		drm_helper_resume_force_mode(dev);



		if (dev_priv->renderctx && dev_priv->pwrctx)

		if (IS_IRONLAKE_M(dev))

			ironlake_enable_rc6(dev);

	}

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -958,6 +958,7 @@ extern unsigned int i915_fbpercrtc; 
extern unsigned int i915_powersave;

extern unsigned int i915_lvds_downclock;

extern unsigned int i915_panel_use_ssc;

extern unsigned int i915_enable_rc6;



extern int i915_suspend(struct drm_device *dev, pm_message_t state);

extern int i915_resume(struct drm_device *dev);

drivers/gpu/drm/i915/intel_display.c

+50 −42
Original line number Diff line number Diff line
@@ -6463,29 +6463,19 @@ void intel_enable_clock_gating(struct drm_device *dev) 
	}

}



void intel_disable_clock_gating(struct drm_device *dev)

static void ironlake_teardown_rc6(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;



	if (dev_priv->renderctx) {

		struct drm_i915_gem_object *obj = dev_priv->renderctx;



		I915_WRITE(CCID, 0);

		POSTING_READ(CCID);



		i915_gem_object_unpin(obj);

		drm_gem_object_unreference(&obj->base);

		i915_gem_object_unpin(dev_priv->renderctx);

		drm_gem_object_unreference(&dev_priv->renderctx->base);

		dev_priv->renderctx = NULL;

	}



	if (dev_priv->pwrctx) {

		struct drm_i915_gem_object *obj = dev_priv->pwrctx;



		I915_WRITE(PWRCTXA, 0);

		POSTING_READ(PWRCTXA);



		i915_gem_object_unpin(obj);

		drm_gem_object_unreference(&obj->base);

		i915_gem_object_unpin(dev_priv->pwrctx);

		drm_gem_object_unreference(&dev_priv->pwrctx->base);

		dev_priv->pwrctx = NULL;

	}

}
@@ -6494,21 +6484,39 @@ static void ironlake_disable_rc6(struct drm_device *dev) 
{

	struct drm_i915_private *dev_priv = dev->dev_private;



	if (I915_READ(PWRCTXA)) {

		/* Wake the GPU, prevent RC6, then restore RSTDBYCTL */

		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) | RCX_SW_EXIT);

		wait_for(((I915_READ(RSTDBYCTL) & RSX_STATUS_MASK) == RSX_STATUS_ON),

		 10);

	POSTING_READ(CCID);

			 50);



		I915_WRITE(PWRCTXA, 0);

		POSTING_READ(PWRCTXA);



		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);

		POSTING_READ(RSTDBYCTL);

	i915_gem_object_unpin(dev_priv->renderctx);

	drm_gem_object_unreference(&dev_priv->renderctx->base);

	dev_priv->renderctx = NULL;

	i915_gem_object_unpin(dev_priv->pwrctx);

	drm_gem_object_unreference(&dev_priv->pwrctx->base);

	dev_priv->pwrctx = NULL;

	}



	ironlake_disable_rc6(dev);

}



static int ironlake_setup_rc6(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;



	if (dev_priv->renderctx == NULL)

		dev_priv->renderctx = intel_alloc_context_page(dev);

	if (!dev_priv->renderctx)

		return -ENOMEM;



	if (dev_priv->pwrctx == NULL)

		dev_priv->pwrctx = intel_alloc_context_page(dev);

	if (!dev_priv->pwrctx) {

		ironlake_teardown_rc6(dev);

		return -ENOMEM;

	}



	return 0;

}



void ironlake_enable_rc6(struct drm_device *dev)
@@ -6516,15 +6524,26 @@ void ironlake_enable_rc6(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	int ret;



	/* rc6 disabled by default due to repeated reports of hanging during

	 * boot and resume.

	 */

	if (!i915_enable_rc6)

		return;



	ret = ironlake_setup_rc6(dev);

	if (ret)

		return;



	/*

	 * GPU can automatically power down the render unit if given a page

	 * to save state.

	 */

	ret = BEGIN_LP_RING(6);

	if (ret) {

		ironlake_disable_rc6(dev);

		ironlake_teardown_rc6(dev);

		return;

	}



	OUT_RING(MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);

	OUT_RING(MI_SET_CONTEXT);

	OUT_RING(dev_priv->renderctx->gtt_offset |
@@ -6541,6 +6560,7 @@ void ironlake_enable_rc6(struct drm_device *dev) 
	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);

}





/* Set up chip specific display functions */

static void intel_init_display(struct drm_device *dev)

{
@@ -6783,21 +6803,9 @@ void intel_modeset_init(struct drm_device *dev) 
	if (IS_GEN6(dev))

		gen6_enable_rps(dev_priv);



	if (IS_IRONLAKE_M(dev)) {

		dev_priv->renderctx = intel_alloc_context_page(dev);

		if (!dev_priv->renderctx)

			goto skip_rc6;

		dev_priv->pwrctx = intel_alloc_context_page(dev);

		if (!dev_priv->pwrctx) {

			i915_gem_object_unpin(dev_priv->renderctx);

			drm_gem_object_unreference(&dev_priv->renderctx->base);

			dev_priv->renderctx = NULL;

			goto skip_rc6;

		}

	if (IS_IRONLAKE_M(dev))

		ironlake_enable_rc6(dev);

	}



skip_rc6:

	INIT_WORK(&dev_priv->idle_work, intel_idle_update);

	setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer,

		    (unsigned long)dev);

drivers/gpu/drm/i915/intel_drv.h

+0 −1
Original line number Diff line number Diff line
@@ -298,7 +298,6 @@ extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, 
extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,

				    u16 *blue, int regno);

extern void intel_enable_clock_gating(struct drm_device *dev);

extern void intel_disable_clock_gating(struct drm_device *dev);

extern void ironlake_enable_drps(struct drm_device *dev);

extern void ironlake_disable_drps(struct drm_device *dev);

extern void gen6_enable_rps(struct drm_i915_private *dev_priv);