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Commit ac5b4407 authored by Rajesh Yadav's avatar Rajesh Yadav Committed by Gerrit - the friendly Code Review server
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msm: mdss: Fix DSPP usage inconsistency issue 



Dither and IGC blocks in DSPP HW are getting enabled
irrespective of left and right mixers being attached
to DSPP blocks. Ensure that DSPP Dither and IGC blocks
are enabled only when ctrl path either has single mixer
or both mixers are attached to DSPP.
Disable default IGC and Dither configuration on ctrl
destroy.

Change-Id: I98d1b356856886cef296e6e4d300fc2dd9cad314
CRs-Fixed: 2001867
Signed-off-by: default avatarRajesh Yadav <ryadav@codeaurora.org>
parent 5720340d

drivers/video/msm/mdss/mdss_mdp.h

+3 −2
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -1793,7 +1793,8 @@ int mdss_mdp_argc_config(struct msm_fb_data_type *mfd, 
int mdss_mdp_hist_lut_config(struct msm_fb_data_type *mfd,

			struct mdp_hist_lut_data *config, u32 *copyback);

int mdss_mdp_pp_default_overlay_config(struct msm_fb_data_type *mfd,

					struct mdss_panel_data *pdata);

					struct mdss_panel_data *pdata,

					bool enable);

int mdss_mdp_dither_config(struct msm_fb_data_type *mfd,

			struct mdp_dither_cfg_data *config, u32 *copyback,

			   int copy_from_kernel);

drivers/video/msm/mdss/mdss_mdp_ctl.c

+47 −43
Original line number Diff line number Diff line 
/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.

/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -3502,21 +3502,9 @@ int mdss_mdp_ctl_setup(struct mdss_mdp_ctl *ctl) 
	ctl->mixer_left->valid_roi = true;

	ctl->mixer_left->roi_changed = true;



	rc = mdss_mdp_pp_default_overlay_config(ctl->mfd, ctl->panel_data);

	/*

	 * Ignore failure of PP config, ctl set-up can succeed.

	 */

	if (rc) {

		pr_err("failed to set the pp config rc %dfb %d\n", rc,

			ctl->mfd->index);

		rc = 0;

	}



	if (ctl->mfd->split_mode == MDP_DUAL_LM_DUAL_DISPLAY) {

		pr_debug("dual display detected\n");

		return 0;

	}



	} else {

		if (split_fb)

			width = ctl->mfd->split_fb_right;
@@ -3527,7 +3515,8 @@ int mdss_mdp_ctl_setup(struct mdss_mdp_ctl *ctl) 
				if (!ctl->mixer_right) {

					pr_err("unable to allocate right mixer\n");

					if (ctl->mixer_left)

					mdss_mdp_mixer_free(ctl->mixer_left);

						mdss_mdp_mixer_free(

							ctl->mixer_left);

					return -ENOMEM;

				}

			}
@@ -3554,6 +3543,18 @@ int mdss_mdp_ctl_setup(struct mdss_mdp_ctl *ctl) 
			ctl->opmode &= ~(MDSS_MDP_CTL_OP_PACK_3D_ENABLE |

				  MDSS_MDP_CTL_OP_PACK_3D_H_ROW_INT);

		}

	}



	rc = mdss_mdp_pp_default_overlay_config(ctl->mfd, ctl->panel_data,

						true);

	/*

	 * Ignore failure of PP config, ctl set-up can succeed.

	 */

	if (rc) {

		pr_err("failed to set the pp config rc %dfb %d\n", rc,

			ctl->mfd->index);

		rc = 0;

	}

	return 0;

}
@@ -3913,6 +3914,9 @@ int mdss_mdp_ctl_destroy(struct mdss_mdp_ctl *ctl) 
				     CTL_INTF_EVENT_FLAG_DEFAULT);

	WARN(rc, "unable to close panel for intf=%d\n", ctl->intf_num);



	(void) mdss_mdp_pp_default_overlay_config(ctl->mfd, ctl->panel_data,

							false);



	sctl = mdss_mdp_get_split_ctl(ctl);

	if (sctl) {

		pr_debug("destroying split display ctl=%d\n", sctl->num);

drivers/video/msm/mdss/mdss_mdp_pp.c

+61 −51
Original line number Diff line number Diff line
@@ -596,8 +596,9 @@ static void mdss_mdp_hist_irq_set_mask(u32 irq); 
static void mdss_mdp_hist_irq_clear_mask(u32 irq);

static void mdss_mdp_hist_intr_notify(u32 disp);

static int mdss_mdp_panel_default_dither_config(struct msm_fb_data_type *mfd,

					u32 panel_bpp);

static int mdss_mdp_limited_lut_igc_config(struct msm_fb_data_type *mfd);

					u32 panel_bpp, bool enable);

static int mdss_mdp_limited_lut_igc_config(struct msm_fb_data_type *mfd,

					bool enable);

static inline int pp_validate_dspp_mfd_block(struct msm_fb_data_type *mfd,

					int block);

static int pp_mfd_release_all(struct msm_fb_data_type *mfd);
@@ -3042,7 +3043,8 @@ int mdss_mdp_pp_overlay_init(struct msm_fb_data_type *mfd) 
}



int mdss_mdp_pp_default_overlay_config(struct msm_fb_data_type *mfd,

					struct mdss_panel_data *pdata)

					struct mdss_panel_data *pdata,

					bool enable)

{

	int ret = 0;
@@ -3051,13 +3053,14 @@ int mdss_mdp_pp_default_overlay_config(struct msm_fb_data_type *mfd, 
		return -EINVAL;

	}



	ret = mdss_mdp_panel_default_dither_config(mfd, pdata->panel_info.bpp);

	ret = mdss_mdp_panel_default_dither_config(mfd, pdata->panel_info.bpp,

						enable);

	if (ret)

		pr_err("Unable to configure default dither on fb%d ret %d\n",

			mfd->index, ret);



	if (pdata->panel_info.type == DTV_PANEL) {

		ret = mdss_mdp_limited_lut_igc_config(mfd);

		ret = mdss_mdp_limited_lut_igc_config(mfd, enable);

		if (ret)

			pr_err("Unable to configure DTV panel default IGC ret %d\n",

				ret);
@@ -3747,7 +3750,8 @@ static void pp_update_igc_lut(struct mdp_igc_lut_data *cfg, 
		writel_relaxed((cfg->c2_data[i] & 0xFFF) | data, addr);

}



static int mdss_mdp_limited_lut_igc_config(struct msm_fb_data_type *mfd)

static int mdss_mdp_limited_lut_igc_config(struct msm_fb_data_type *mfd,

					bool enable)

{

	int ret = 0;

	u32 copyback = 0;
@@ -3772,7 +3776,10 @@ static int mdss_mdp_limited_lut_igc_config(struct msm_fb_data_type *mfd) 
		pr_err("failed to get default IGC version, ret %d\n", ret);



	config.version = igc_version.version_info;

	if (enable)

		config.ops = MDP_PP_OPS_WRITE | MDP_PP_OPS_ENABLE;

	else

		config.ops = MDP_PP_OPS_DISABLE;

	config.block = (mfd->index) + MDP_LOGICAL_BLOCK_DISP_0;

	switch (config.version) {

	case mdp_igc_v1_7:
@@ -4362,7 +4369,7 @@ enhist_config_exit: 
}



static int mdss_mdp_panel_default_dither_config(struct msm_fb_data_type *mfd,

					u32 panel_bpp)

					u32 panel_bpp, bool enable)

{

	int ret = 0;

	struct mdp_dither_cfg_data dither;
@@ -4387,7 +4394,9 @@ static int mdss_mdp_panel_default_dither_config(struct msm_fb_data_type *mfd, 
		return ret;

	}

	dither.version = dither_version.version_info;

	dither.cfg_payload = NULL;



	if (enable) {

		switch (panel_bpp) {

		case 24:

			dither.flags = MDP_PP_OPS_ENABLE | MDP_PP_OPS_WRITE;
@@ -4437,6 +4446,7 @@ static int mdss_mdp_panel_default_dither_config(struct msm_fb_data_type *mfd, 
			dither.cfg_payload = NULL;

			break;

		}

	}

	ret = mdss_mdp_dither_config(mfd, &dither, NULL, true);

	if (ret)

		pr_err("dither config failed, ret %d\n", ret);