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Commit ab6d1f00 authored by Deepak Katragadda's avatar Deepak Katragadda
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clk: msm: clock-pll: Remove list_registers callback for CPU PLLs 



The register offsets for the CPU PLLs might vary with
the standard offsets used for other PLLs. Remove having
the print capability for these clocks.

CRs-Fixed: 941434
Change-Id: Id67a70117b0621d98ac010f712552ecaaf92641f
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent e3ea6c56

drivers/clk/msm/clock-pll.c

+1 −2
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -890,7 +890,6 @@ struct clk_ops clk_ops_variable_rate_pll_hwfsm = { 
	.set_rate = variable_rate_pll_set_rate,

	.round_rate = variable_rate_pll_round_rate,

	.handoff = variable_rate_pll_handoff,

	.list_registers = variable_rate_pll_list_registers,

};



struct clk_ops clk_ops_variable_rate_pll = {