Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit aaf3fedb authored by Jonas Gorski's avatar Jonas Gorski Committed by Ralf Baechle
Browse files

MIPS: BCM63XX: Add flash type detection 



On BCM6358 and BCM6368 the attached flash type is exposed through a
bootstrapping register. Use it for auto detecting the flash type on
those and default to parallel flash for earlier SoCs.

Signed-off-by: default avatarJonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3954/


Reviewed-by: default avatarFlorian Fainelli <florian@openwrt.org>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 4b897d54

arch/mips/bcm63xx/dev-flash.c

+54 −6
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
 *

 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>

 * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>

 * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>

 */



#include <linux/init.h>
@@ -54,10 +55,46 @@ static struct platform_device mtd_dev = { 
	},

};



static int __init bcm63xx_detect_flash_type(void)

{

	u32 val;



	switch (bcm63xx_get_cpu_id()) {

	case BCM6338_CPU_ID:

	case BCM6345_CPU_ID:

	case BCM6348_CPU_ID:

		/* no way to auto detect so assume parallel */

		return BCM63XX_FLASH_TYPE_PARALLEL;

	case BCM6358_CPU_ID:

		val = bcm_gpio_readl(GPIO_STRAPBUS_REG);

		if (val & STRAPBUS_6358_BOOT_SEL_PARALLEL)

			return BCM63XX_FLASH_TYPE_PARALLEL;

		else

			return BCM63XX_FLASH_TYPE_SERIAL;

	case BCM6368_CPU_ID:

		val = bcm_gpio_readl(GPIO_STRAPBUS_REG);

		switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {

		case STRAPBUS_6368_BOOT_SEL_NAND:

			return BCM63XX_FLASH_TYPE_NAND;

		case STRAPBUS_6368_BOOT_SEL_SERIAL:

			return BCM63XX_FLASH_TYPE_SERIAL;

		case STRAPBUS_6368_BOOT_SEL_PARALLEL:

			return BCM63XX_FLASH_TYPE_PARALLEL;

		}

	default:

		return -EINVAL;

	}

}



int __init bcm63xx_flash_register(void)

{

	int flash_type;

	u32 val;



	flash_type = bcm63xx_detect_flash_type();



	switch (flash_type) {

	case BCM63XX_FLASH_TYPE_PARALLEL:

		/* read base address of boot chip select (0) */

		val = bcm_mpi_readl(MPI_CSBASE_REG(0));

		val &= MPI_CSBASE_BASE_MASK;
@@ -66,4 +103,15 @@ int __init bcm63xx_flash_register(void) 
		mtd_resources[0].end = 0x1FFFFFFF;



		return platform_device_register(&mtd_dev);

	case BCM63XX_FLASH_TYPE_SERIAL:

		pr_warn("unsupported serial flash detected\n");

		return -ENODEV;

	case BCM63XX_FLASH_TYPE_NAND:

		pr_warn("unsupported NAND flash detected\n");

		return -ENODEV;

	default:

		pr_err("flash detection failed for BCM%x: %d\n",

		       bcm63xx_get_cpu_id(), flash_type);

		return -ENODEV;

	}

}

arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h

+6 −0
Original line number Diff line number Diff line 
#ifndef __BCM63XX_FLASH_H

#define __BCM63XX_FLASH_H



enum {

	BCM63XX_FLASH_TYPE_PARALLEL,

	BCM63XX_FLASH_TYPE_SERIAL,

	BCM63XX_FLASH_TYPE_NAND,

};



int __init bcm63xx_flash_register(void);



#endif /* __BCM63XX_FLASH_H */

arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h

+9 −0
Original line number Diff line number Diff line
@@ -507,6 +507,15 @@ 
#define GPIO_BASEMODE_6368_MASK		0x7

/* those bits must be kept as read in gpio basemode register*/



#define GPIO_STRAPBUS_REG		0x40

#define STRAPBUS_6358_BOOT_SEL_PARALLEL	(1 << 1)

#define STRAPBUS_6358_BOOT_SEL_SERIAL	(0 << 1)

#define STRAPBUS_6368_BOOT_SEL_MASK	0x3

#define STRAPBUS_6368_BOOT_SEL_NAND	0

#define STRAPBUS_6368_BOOT_SEL_SERIAL	1

#define STRAPBUS_6368_BOOT_SEL_PARALLEL	3





/*************************************************************************

 * _REG relative to RSET_ENET

 *************************************************************************/