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Commit aad71918 authored by Ben Greear's avatar Ben Greear Committed by David S. Miller
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ixgbe patch to provide NIC's tx/rx counters via ethtool 



When LRO is enabled, the received packet and byte counters represent the
LRO'd packets, not the packets/bytes on the wire.  The Intel 82599 NIC has
registers that keep count of the physical packets.  Add these counters to
the ethtool stats.  The byte counters are 36-bit, but the high 4 bits were
being ignored in the 2.6.31 ixgbe driver:  Read those as well to allow
longer time between polling the stats to detect wraps.

Signed-off-by: default avatarBen Greear <greearb@candelatech.com>
Acked-by: default avatarPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e0f4daff

drivers/net/ixgbe/ixgbe_ethtool.c

+4 −0
Original line number Diff line number Diff line
@@ -53,6 +53,10 @@ static struct ixgbe_stats ixgbe_gstrings_stats[] = { 
	{"tx_packets", IXGBE_STAT(net_stats.tx_packets)},

	{"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},

	{"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},

	{"rx_pkts_nic", IXGBE_STAT(stats.gprc)},

	{"tx_pkts_nic", IXGBE_STAT(stats.gptc)},

	{"rx_bytes_nic", IXGBE_STAT(stats.gorc)},

	{"tx_bytes_nic", IXGBE_STAT(stats.gotc)},

	{"lsc_int", IXGBE_STAT(lsc_int)},

	{"tx_busy", IXGBE_STAT(tx_busy)},

	{"non_eop_descs", IXGBE_STAT(non_eop_descs)},

drivers/net/ixgbe/ixgbe_main.c

+5 −2
Original line number Diff line number Diff line
@@ -4449,10 +4449,13 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter) 


	/* 82598 hardware only has a 32 bit counter in the high register */

	if (hw->mac.type == ixgbe_mac_82599EB) {

		u64 tmp;

		adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);

		IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */

		tmp = IXGBE_READ_REG(hw, IXGBE_GORCH) & 0xF; /* 4 high bits of GORC */

		adapter->stats.gorc += (tmp << 32);

		adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);

		IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */

		tmp = IXGBE_READ_REG(hw, IXGBE_GOTCH) & 0xF; /* 4 high bits of GOTC */

		adapter->stats.gotc += (tmp << 32);

		adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORL);

		IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */

		adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);