Loading arch/arm/boot/dts/qcom/mdmfermium-regulator.dtsi +84 −11 Original line number Diff line number Diff line Loading @@ -279,21 +279,94 @@ }; }; &soc { /* VDD APC supply */ /* TODO: move to SPM controlled regulator */ mdmfermium_s1: regulator-s1 { compatible = "qcom,stub-regulator"; &spmi_bus { qcom,pm8019@1 { /* APC supply */ mdmfermium_s1: spm-regulator@1400 { compatible = "qcom,spm-regulator"; reg = <0x1400 0x100>; regulator-name = "mdmfermium_s1"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1350000>; qcom,bypass-spm; /* TODO: Remove once SPM is up */ }; }; }; /* TODO: move to CPR regulator */ apc_vreg_corner: apc-vreg { compatible = "qcom,stub-regulator"; regulator-name = "apc_vreg"; &soc { mem_acc_vreg_corner: regulator@1942130 { compatible = "qcom,mem-acc-regulator"; reg = <0x1942130 0x4>; reg-names = "acc-sel-l1"; regulator-name = "mem_acc_corner"; regulator-min-microvolt = <1>; regulator-max-microvolt = <3>; qcom,acc-sel-l1-bit-pos = <0>; qcom,corner-acc-map = <0 1 1>; }; apc_vreg_corner: regulator@b018000 { compatible = "qcom,cpr-regulator"; reg = <0xb018000 0x1000>, <0xb010058 4>, <0xa4000 0x1000>; reg-names = "rbcpr", "rbcpr_clk", "efuse_addr"; interrupts = <0 15 0>; regulator-name = "apc_corner"; qcom,cpr-fuse-corners = <3>; regulator-min-microvolt = <1>; regulator-max-microvolt = <7>; qcom,cpr-voltage-ceiling = <1050000 1225000 1350000>; qcom,cpr-voltage-floor = <1050000 1050000 1150000>; vdd-apc-supply = <&mdmfermium_s1>; vdd-mx-supply = <&mdmfermium_l12_level_ao>; qcom,vdd-mx-vmin-method = <4>; qcom,vdd-mx-corner-map = < RPM_SMD_REGULATOR_LEVEL_SVS RPM_SMD_REGULATOR_LEVEL_NOM RPM_SMD_REGULATOR_LEVEL_TURBO >; qcom,vdd-mx-vmax = <RPM_SMD_REGULATOR_LEVEL_TURBO>; mem-acc-supply = <&mem_acc_vreg_corner>; qcom,cpr-ref-clk = <19200>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-cons-up = <0>; qcom,cpr-timer-cons-down = <2>; qcom,cpr-irq-line = <0>; qcom,cpr-step-quotient = <26>; qcom,cpr-up-threshold = <0>; qcom,cpr-down-threshold = <2>; qcom,cpr-idle-clocks = <15>; qcom,cpr-gcnt-time = <1>; qcom,vdd-apc-step-up-limit = <1>; qcom,vdd-apc-step-down-limit = <1>; qcom,cpr-apc-volt-step = <12500>; qcom,cpr-fuse-row = <65 0>; qcom,cpr-fuse-target-quot = <24 12 0>; qcom,cpr-fuse-ro-sel = <42 39 36>; qcom,cpr-fuse-bp-cpr-disable = <54>; qcom,cpr-fuse-init-voltage = <66 6 6 0>, <66 0 6 0>, <65 45 6 0>; qcom,cpr-fuse-revision = <65 51 3 0>; qcom,cpr-init-voltage-ref = <1050000 1225000 1350000>; qcom,cpr-init-voltage-step = <10000>; qcom,cpr-corner-map = <1 2 3 3 3 3 3>; qcom,cpr-init-voltage-as-ceiling; qcom,cpr-corner-frequency-map = <1 400000000>, <2 800000000>, <3 998400000>, <4 1094400000>, <5 1190400000>, <6 1248000000>, <7 1305600000>; qcom,speed-bin-fuse-sel = <37 34 3 0>; qcom,cpr-speed-bin-max-corners = <0 0 1 2 7>; qcom,cpr-quot-adjust-scaling-factor-max = <1400>; }; }; arch/arm/boot/dts/qcom/mdmfermium.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -273,8 +273,8 @@ clock-names = "clk-1", "clk-5"; qcom,speed0-bin-v0 = < 0 0>, < 400000000 4>, < 800000000 5>, < 400000000 1>, < 800000000 2>, < 1305600000 7>; #clock-cells = <1>; }; Loading Loading
arch/arm/boot/dts/qcom/mdmfermium-regulator.dtsi +84 −11 Original line number Diff line number Diff line Loading @@ -279,21 +279,94 @@ }; }; &soc { /* VDD APC supply */ /* TODO: move to SPM controlled regulator */ mdmfermium_s1: regulator-s1 { compatible = "qcom,stub-regulator"; &spmi_bus { qcom,pm8019@1 { /* APC supply */ mdmfermium_s1: spm-regulator@1400 { compatible = "qcom,spm-regulator"; reg = <0x1400 0x100>; regulator-name = "mdmfermium_s1"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1350000>; qcom,bypass-spm; /* TODO: Remove once SPM is up */ }; }; }; /* TODO: move to CPR regulator */ apc_vreg_corner: apc-vreg { compatible = "qcom,stub-regulator"; regulator-name = "apc_vreg"; &soc { mem_acc_vreg_corner: regulator@1942130 { compatible = "qcom,mem-acc-regulator"; reg = <0x1942130 0x4>; reg-names = "acc-sel-l1"; regulator-name = "mem_acc_corner"; regulator-min-microvolt = <1>; regulator-max-microvolt = <3>; qcom,acc-sel-l1-bit-pos = <0>; qcom,corner-acc-map = <0 1 1>; }; apc_vreg_corner: regulator@b018000 { compatible = "qcom,cpr-regulator"; reg = <0xb018000 0x1000>, <0xb010058 4>, <0xa4000 0x1000>; reg-names = "rbcpr", "rbcpr_clk", "efuse_addr"; interrupts = <0 15 0>; regulator-name = "apc_corner"; qcom,cpr-fuse-corners = <3>; regulator-min-microvolt = <1>; regulator-max-microvolt = <7>; qcom,cpr-voltage-ceiling = <1050000 1225000 1350000>; qcom,cpr-voltage-floor = <1050000 1050000 1150000>; vdd-apc-supply = <&mdmfermium_s1>; vdd-mx-supply = <&mdmfermium_l12_level_ao>; qcom,vdd-mx-vmin-method = <4>; qcom,vdd-mx-corner-map = < RPM_SMD_REGULATOR_LEVEL_SVS RPM_SMD_REGULATOR_LEVEL_NOM RPM_SMD_REGULATOR_LEVEL_TURBO >; qcom,vdd-mx-vmax = <RPM_SMD_REGULATOR_LEVEL_TURBO>; mem-acc-supply = <&mem_acc_vreg_corner>; qcom,cpr-ref-clk = <19200>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-cons-up = <0>; qcom,cpr-timer-cons-down = <2>; qcom,cpr-irq-line = <0>; qcom,cpr-step-quotient = <26>; qcom,cpr-up-threshold = <0>; qcom,cpr-down-threshold = <2>; qcom,cpr-idle-clocks = <15>; qcom,cpr-gcnt-time = <1>; qcom,vdd-apc-step-up-limit = <1>; qcom,vdd-apc-step-down-limit = <1>; qcom,cpr-apc-volt-step = <12500>; qcom,cpr-fuse-row = <65 0>; qcom,cpr-fuse-target-quot = <24 12 0>; qcom,cpr-fuse-ro-sel = <42 39 36>; qcom,cpr-fuse-bp-cpr-disable = <54>; qcom,cpr-fuse-init-voltage = <66 6 6 0>, <66 0 6 0>, <65 45 6 0>; qcom,cpr-fuse-revision = <65 51 3 0>; qcom,cpr-init-voltage-ref = <1050000 1225000 1350000>; qcom,cpr-init-voltage-step = <10000>; qcom,cpr-corner-map = <1 2 3 3 3 3 3>; qcom,cpr-init-voltage-as-ceiling; qcom,cpr-corner-frequency-map = <1 400000000>, <2 800000000>, <3 998400000>, <4 1094400000>, <5 1190400000>, <6 1248000000>, <7 1305600000>; qcom,speed-bin-fuse-sel = <37 34 3 0>; qcom,cpr-speed-bin-max-corners = <0 0 1 2 7>; qcom,cpr-quot-adjust-scaling-factor-max = <1400>; }; };
arch/arm/boot/dts/qcom/mdmfermium.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -273,8 +273,8 @@ clock-names = "clk-1", "clk-5"; qcom,speed0-bin-v0 = < 0 0>, < 400000000 4>, < 800000000 5>, < 400000000 1>, < 800000000 2>, < 1305600000 7>; #clock-cells = <1>; }; Loading