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Commit a8f815c4 authored by Jordan Crouse's avatar Jordan Crouse
Browse files

ARM: dts: msm: Add new GPU power level speed bin 



Add a a set of GPU power levels for speed bin <1>.

Change-Id: Ic0dedbadd602ab318e13392da22f2dd7f063672b
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent 0fef7bbc

arch/arm/boot/dts/qcom/msm8996-v3.dtsi

+125 −64
Original line number Diff line number Diff line
@@ -86,12 +86,17 @@ 
	qcom,initial-pwrlevel = <5>;

	qcom,bus-width = <32>;



	/* Power levels */

	qcom,gpu-pwrlevels {

	qcom,gpu-pwrlevel-bins {

		#address-cells = <1>;

		#size-cells = <0>;



		compatible = "qcom,gpu-pwrlevels";

		compatible="qcom,gpu-pwrlevel-bins";



		qcom,gpu-pwrlevels-0 {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,speed-bin = <0>;



			qcom,gpu-pwrlevel@0 {

				reg = <0>;
@@ -156,6 +161,62 @@ 
				qcom,bus-min = <0>;

				qcom,bus-max = <0>;

			};

		};



		qcom,gpu-pwrlevels-1 {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,speed-bin = <1>;



			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <510000000>;

				qcom,bus-freq = <9>;

				qcom,bus-min = <8>;

				qcom,bus-max = <10>;

			};



			qcom,gpu-pwrlevel@1 {

				reg = <1>;

				qcom,gpu-freq = <401800000>;

				qcom,bus-freq = <8>;

				qcom,bus-min = <7>;

				qcom,bus-max = <9>;

			};



			qcom,gpu-pwrlevel@2 {

				reg = <2>;

				qcom,gpu-freq = <315000000>;

				qcom,bus-freq = <6>;

				qcom,bus-min = <5>;

				qcom,bus-max = <7>;

			};



			qcom,gpu-pwrlevel@3 {

				reg = <3>;

				qcom,gpu-freq = <214000000>;

				qcom,bus-freq = <4>;

				qcom,bus-min = <3>;

				qcom,bus-max = <5>;

			};



			qcom,gpu-pwrlevel@4 {

				reg = <4>;

				qcom,gpu-freq = <133000000>;

				qcom,bus-freq = <3>;

				qcom,bus-min = <2>;

				qcom,bus-max = <4>;

			};



			qcom,gpu-pwrlevel@5 {

				reg = <5>;

				qcom,gpu-freq = <27000000>;

				qcom,bus-freq = <0>;

				qcom,bus-min = <0>;

				qcom,bus-max = <0>;

			};

		};



	};

};