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Commit a8c4b90e authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM SoC platform updates (part 2) from Arnd Bergmann:
 "These patches are all for Renesas shmobile, and depend on the earlier
  pinctrl updates.  Remarkably, this adds support for three new SoCs:
  r8a73a4, r8a73a4 and r8a7778.  The bulk of the code added for these is
  for pinctrl (using the new subsystem) and for clocks (not yet using
  the common clock subsystem).  The latter will have to get converted in
  one of the upcoming releases, but shmobile is not ready for that yet.

  The series also contains Renesas shmobile board changes, adding one
  board file for each of the three new SoCs.  These boards are using a
  mix of classic and device-tree based probing, as there is still a lot
  of infrastructure in shmobile that has not been converted to DT yet.
  Once those are resolved to the degree that no board specific setup
  code is needed, they can get folded into the respective SoC setup files."

* tag 'soc-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits)
  ARM: shmobile: use r8a7790 timer setup code on Lager
  ARM: shmobile: force enable of r8a7790 arch timer
  ARM: shmobile: Add second I/O range for r8a7790 PFC
  ARM: shmobile: bockw: enable network settings on bootargs
  ARM: shmobile: bockw: add SMSC ethernet support
  ARM: shmobile: R8A7778: add Ether support
  ARM: shmobile: bockw: enable SMSC ethernet on defconfig
  ARM: shmobile: r8a7778: add r8a7778_init_irq_extpin()
  ARM: shmobile: r8a7778: remove pointless PLATFORM_INFO()
  ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection
  ARM: shmobile: mackerel: add interrupt names for SDHI0
  ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio
  ARM: shmobile: mackerel: remove OCR masks, where regulators are used
  ARM: shmobile: mackerel: SDHI resources do not have to be numbered
  ARM: shmobile: Initial r8a7790 Lager board support
  ARM: shmobile: APE6EVM LAN9220 support
  ARM: shmobile: APE6EVM PFC support
  ARM: shmobile: APE6EVM base support
  ARM: shmobile: kzm9g-reference: add ethernet support
  ARM: shmobile: add R-Car M1A Bock-W platform support
  ...
parents eac84105 9251c6c0
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+1 −1
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@@ -643,7 +643,7 @@ config ARCH_SHMOBILE
	select MULTI_IRQ_HANDLER
	select NEED_MACH_MEMORY_H
	select NO_IOPORT
	select PINCTRL
	select PINCTRL if ARCH_WANT_OPTIONAL_GPIOLIB
	select PM_GENERIC_DOMAINS if PM
	select SPARSE_IRQ
	help
+3 −0
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@@ -155,9 +155,12 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
	ccu9540.dtb
dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
	r8a7740-armadillo800eva.dtb \
	r8a7778-bockw.dtb \
	r8a7779-marzen-reference.dtb \
	r8a7790-lager.dtb \
	sh73a0-kzm9g.dtb \
	sh73a0-kzm9g-reference.dtb \
	r8a73a4-ape6evm.dtb \
	sh7372-mackerel.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
	socfpga_vt.dtb
+52 −0
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/*
 * Device Tree Source for the APE6EVM board
 *
 * Copyright (C) 2013 Renesas Solutions Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/dts-v1/;
/include/ "r8a73a4.dtsi"

/ {
	model = "APE6EVM";
	compatible = "renesas,ape6evm", "renesas,r8a73a4";

	chosen {
		bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp";
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0 0x40000000 0 0x40000000>;
	};

	ape6evm_fixed_3v3: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "3V3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	lbsc {
		#address-cells = <1>;
		#size-cells = <1>;

		ethernet@8000000 {
			compatible = "smsc,lan9118", "smsc,lan9115";
			reg = <0x08000000 0x1000>;
			interrupt-parent = <&irqc1>;
			interrupts = <8 0x4>;
			phy-mode = "mii";
			reg-io-width = <4>;
			smsc,irq-active-high;
			smsc,irq-push-pull;
			vdd33a-supply = <&ape6evm_fixed_3v3>;
			vddvario-supply = <&ape6evm_fixed_3v3>;
		};
	};
};
+94 −0
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/*
 * Device Tree Source for the r8a73a4 SoC
 *
 * Copyright (C) 2013 Renesas Solutions Corp.
 * Copyright (C) 2013 Magnus Damm
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/ {
	compatible = "renesas,r8a73a4";
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0>;
			clock-frequency = <1500000000>;
		};
	};

	gic: interrupt-controller@f1001000 {
		compatible = "arm,cortex-a15-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0 0xf1001000 0 0x1000>,
			<0 0xf1002000 0 0x1000>,
			<0 0xf1004000 0 0x2000>,
			<0 0xf1006000 0 0x2000>;
		interrupts = <1 9 0xf04>;

		gic-cpuif@4 {
			compatible = "arm,gic-cpuif";
			cpuif-id = <4>;
			cpu = <&cpu0>;
		};
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <1 13 0xf08>,
				<1 14 0xf08>,
				<1 11 0xf08>,
				<1 10 0xf08>;
	};

	irqc0: interrupt-controller@e61c0000 {
		compatible = "renesas,irqc";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0 0xe61c0000 0 0x200>;
		interrupt-parent = <&gic>;
		interrupts = <0 0 4>, <0 1 4>, <0 2 4>,	<0 3 4>,
				<0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>,
				<0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>,
				<0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>,
				<0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>,
				<0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>,
				<0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>,
				<0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>;
	};

	irqc1: interrupt-controller@e61c0200 {
		compatible = "renesas,irqc";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0 0xe61c0200 0 0x200>;
		interrupt-parent = <&gic>;
		interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>,
				<0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>,
				<0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>,
				<0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>,
				<0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>,
				<0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>,
				<0 56 4>, <0 57 4>;
	};

	thermal@e61f0000 {
		compatible = "renesas,rcar-thermal";
		reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
			 <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
		interrupt-parent = <&gic>;
		interrupts = <0 69 4>;
	};
};
+32 −0
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/*
 * Reference Device Tree Source for the Bock-W board
 *
 * Copyright (C) 2013  Renesas Solutions Corp.
 * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
 *
 * based on r8a7779
 *
 * Copyright (C) 2013 Renesas Solutions Corp.
 * Copyright (C) 2013 Simon Horman
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/dts-v1/;
/include/ "r8a7778.dtsi"

/ {
	model = "bockw";
	compatible = "renesas,bockw", "renesas,r8a7778";

	chosen {
		bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs";
	};

	memory {
		device_type = "memory";
		reg = <0x60000000 0x10000000>;
	};
};
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