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Commit a85f2ada authored by Shashank Mittal's avatar Shashank Mittal
Browse files

ARM: dts: msm: add coresight dt support for MSMCobalt 



Add device tree support for CoreSight and Debug components
according to MSMCobalt memory map.

Change-Id: I76a51b410c94629623347b6460db09c2fc3e693c
Signed-off-by: default avatarShashank Mittal <mittals@codeaurora.org>
parent 6246bf9a

arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi

0 → 100644
+189 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&soc {

	tmc_etr: tmc@6048000 {

		compatible = "arm,primecell";

		arm,primecell-periphid = <0x0003b961>;



		reg = <0x6048000 0x1000>,

		      <0x6064000 0x15000>;

		reg-names = "tmc-base", "bam-base";



		arm,buffer-size = <0x400000>;



		coresight-name = "coresight-tmc-etr";



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "apb_pclk", "core_a_clk";



		port{

			tmc_etr_in_replicator: endpoint {

				slave-mode;

				remote-endpoint = <&replicator_out_tmc_etr>;

			};

		};

	};



	replicator: replicator@6046000 {

		compatible = "arm,coresight-replicator";



		coresight-name = "coresight-replicator";



		ports{

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				replicator_out_tmc_etr:endpoint {

					remote-endpoint =

						<&tmc_etr_in_replicator>;

				};

			};

			port@1 {

				reg = <0>;

				replicator_in_tmc_etf:endpoint {

					slave-mode;

					remote-endpoint =

						<&tmc_etf_out_replicator>;

				};

			};

		};

	};



	tmc_etf: tmc@6047000 {

		compatible = "arm,primecell";

		arm,primecell-periphid = <0x0003b961>;



		reg = <0x6047000 0x1000>;

		reg-names = "tmc-base";



		coresight-name = "coresight-tmc-etf";



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "apb_pclk", "core_a_clk";



		ports{

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				tmc_etf_out_replicator:endpoint {

					remote-endpoint =

						<&replicator_in_tmc_etf>;

				};

			};

			port@1 {

				reg = <0>;

				tmc_etf_in_funnel_merg:endpoint {

					slave-mode;

					remote-endpoint =

						<&funnel_merg_out_tmc_etf>;

				};

			};

		};

	};



	funnel_merg: funnel@6045000 {

		compatible = "arm,primecell";

		arm,primecell-periphid = <0x0003b908>;



		reg = <0x6045000 0x1000>;

		reg-names = "funnel-base";



		coresight-name = "coresight-funnel-merg";



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "apb_pclk", "core_a_clk";



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				funnel_merg_out_tmc_etf:endpoint {

					remote-endpoint =

						<&tmc_etf_in_funnel_merg>;

				};

			};

			port@1 {

				reg = <0>;

				funnel_merg_in_funnel_in0:endpoint {

					slave-mode;

					remote-endpoint =

						<&funnel_in0_out_funnel_merg>;

				};

			};

		};

	};



	funnel_in0: funnel@6041000 {

		compatible = "arm,primecell";

		arm,primecell-periphid = <0x0003b908>;



		reg = <0x6041000 0x1000>;

		reg-names = "funnel-base";



		coresight-name = "coresight-funnel-in0";



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "apb_pclk", "core_a_clk";



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				funnel_in0_out_funnel_merg: endpoint {

					remote-endpoint =

						<&funnel_merg_in_funnel_in0>;

				};

			};

			port@1 {

				reg = <7>;

				funnel_in0_in_stm: endpoint {

					slave-mode;

					remote-endpoint = <&stm_out_funnel_in0>;

				};

			};

		};

	};



	stm: stm@6002000 {

		compatible = "arm,primecell";

		arm,primecell-periphid = <0x0003b962>;



		reg = <0x6002000 0x1000>,

		      <0x16280000 0x180000>;

		reg-names = "stm-base", "stm-data-base";



		coresight-name = "coresight-stm";



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "apb_pclk", "core_a_clk";



		port{

			stm_out_funnel_in0: endpoint {

				remote-endpoint = <&funnel_in0_in_stm>;

			};

		};

	};

};

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -1466,3 +1466,4 @@ 
#include "msmcobalt-regulator.dtsi"

#include "msmcobalt-camera.dtsi"

#include "msmcobalt-vidc.dtsi"

#include "msmcobalt-coresight.dtsi"