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Commit a802fc68 authored by Chris Metcalf's avatar Chris Metcalf
Browse files

arch/tile: Save and restore extra user state for tilegx 



During context switch, save and restore a couple of additional bits of
tilegx user state that can be persistently modified by userspace.

Signed-off-by: default avatarChris Metcalf <cmetcalf@tilera.com>
parent 74fca9da

arch/tile/include/arch/chip_tile64.h

+3 −0
Original line number Diff line number Diff line
@@ -150,6 +150,9 @@ 
/** Is the PROC_STATUS SPR supported? */

#define CHIP_HAS_PROC_STATUS_SPR() 0



/** Is the DSTREAM_PF SPR supported? */

#define CHIP_HAS_DSTREAM_PF() 0



/** Log of the number of mshims we have. */

#define CHIP_LOG_NUM_MSHIMS() 2

arch/tile/include/arch/chip_tilepro.h

+3 −0
Original line number Diff line number Diff line
@@ -150,6 +150,9 @@ 
/** Is the PROC_STATUS SPR supported? */

#define CHIP_HAS_PROC_STATUS_SPR() 1



/** Is the DSTREAM_PF SPR supported? */

#define CHIP_HAS_DSTREAM_PF() 0



/** Log of the number of mshims we have. */

#define CHIP_LOG_NUM_MSHIMS() 2

arch/tile/include/asm/processor.h

+12 −0
Original line number Diff line number Diff line
@@ -103,6 +103,18 @@ struct thread_struct { 
	/* Any other miscellaneous processor state bits */

	unsigned long proc_status;

#endif

#if !CHIP_HAS_FIXED_INTVEC_BASE()

	/* Interrupt base for PL0 interrupts */

	unsigned long interrupt_vector_base;

#endif

#if CHIP_HAS_TILE_RTF_HWM()

	/* Tile cache retry fifo high-water mark */

	unsigned long tile_rtf_hwm;

#endif

#if CHIP_HAS_DSTREAM_PF()

	/* Data stream prefetch control */

	unsigned long dstream_pf;

#endif

#ifdef CONFIG_HARDWALL

	/* Is this task tied to an activated hardwall? */

	struct hardwall_info *hardwall;

arch/tile/kernel/process.c

+16 −7
Original line number Diff line number Diff line
@@ -408,6 +408,15 @@ static void save_arch_state(struct thread_struct *t) 
#if CHIP_HAS_PROC_STATUS_SPR()

	t->proc_status = __insn_mfspr(SPR_PROC_STATUS);

#endif

#if !CHIP_HAS_FIXED_INTVEC_BASE()

	t->interrupt_vector_base = __insn_mfspr(SPR_INTERRUPT_VECTOR_BASE_0);

#endif

#if CHIP_HAS_TILE_RTF_HWM()

	t->tile_rtf_hwm = __insn_mfspr(SPR_TILE_RTF_HWM);

#endif

#if CHIP_HAS_DSTREAM_PF()

	t->dstream_pf = __insn_mfspr(SPR_DSTREAM_PF);

#endif

}



static void restore_arch_state(const struct thread_struct *t)
@@ -428,14 +437,14 @@ static void restore_arch_state(const struct thread_struct *t) 
#if CHIP_HAS_PROC_STATUS_SPR()

	__insn_mtspr(SPR_PROC_STATUS, t->proc_status);

#endif

#if !CHIP_HAS_FIXED_INTVEC_BASE()

	__insn_mtspr(SPR_INTERRUPT_VECTOR_BASE_0, t->interrupt_vector_base);

#endif

#if CHIP_HAS_TILE_RTF_HWM()

	/*

	 * Clear this whenever we switch back to a process in case

	 * the previous process was monkeying with it.  Even if enabled

	 * in CBOX_MSR1 via TILE_RTF_HWM_MIN, it's still just a

	 * performance hint, so isn't worth a full save/restore.

	 */

	__insn_mtspr(SPR_TILE_RTF_HWM, 0);

	__insn_mtspr(SPR_TILE_RTF_HWM, t->tile_rtf_hwm);

#endif

#if CHIP_HAS_DSTREAM_PF()

	__insn_mtspr(SPR_DSTREAM_PF, t->dstream_pf);

#endif

}