Loading arch/arm/boot/dts/qcom/msm8909-camera-sensor-mtp.dtsi +3 −1 Original line number Diff line number Diff line /* * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -187,6 +187,8 @@ "CAM_RESET", "CAM_STANDBY"; qcom,cci-master = <0>; qcom,sensor-position = <1>; qcom,sensor-mode = <0>; status = "ok"; clocks = <&clock_gcc clk_mclk1_clk_src>, <&clock_gcc clk_gcc_camss_mclk1_clk>; Loading arch/arm/boot/dts/qcom/msm8909-camera.dtsi +40 −25 Original line number Diff line number Diff line /* * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2015, 2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -14,6 +14,11 @@ &soc { qcom,msm-cam@1800000{ compatible = "qcom,msm-cam"; reg = <0x1b00000 0x40000>; reg-names = "msm-cam"; status = "ok"; bus-vectors = "suspend", "svs", "nominal", "turbo"; qcom,bus-votes = <0 320000000 640000000 640000000>; }; qcom,csiphy@1b0ac00 { Loading Loading @@ -96,35 +101,41 @@ reg-names = "ispif", "csi_clk_mux"; interrupts = <0 51 0>; interrupt-names = "ispif"; clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>, qcom,num-isps = <0x1>; vfe0_vdd_supply = <&gdsc_vfe>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_csi0_clk_src>, <&clock_gcc clk_gcc_camss_csi0_clk>, <&clock_gcc clk_gcc_camss_csi0pix_clk>, <&clock_gcc clk_gcc_camss_csi0rdi_clk>, <&clock_gcc clk_gcc_camss_csi0pix_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>; clock-names = "ispif_ahb_clk","camss_ahb_clk", clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi0_src_clk", "csi0_clk", "csi0_pix_clk","csi0_rdi_clk", "csi1_src_clk", "csi1_clk", "csi1_pix_clk", "csi1_rdi_clk", "csi0_rdi_clk", "csi0_pix_clk", "csi1_src_clk", "csi1_clk", "csi1_rdi_clk", "csi1_pix_clk", "vfe0_clk_src", "camss_vfe_vfe0_clk", "camss_csi_vfe0_clk"; qcom,clock-rates = <40000000 0 0 0 0 0 0 0 0 0 0 0 0>; qcom,clock-rates = <0 40000000 200000000 0 0 0 200000000 0 0 0 0 0 0>; qcom,clock-control = "NO_SET_RATE", "SET_RATE", "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE"; }; qcom,vfe { compatible = "qcom,vfe"; #address-cells = <1>; #size-cells = <1>; ranges; vfe0: qcom,vfe0@1b10000 { qcom,vfe@1b10000 { cell-index = <0>; compatible = "qcom,vfe32"; reg = <0x1b10000 0x830>, Loading @@ -142,9 +153,8 @@ <&clock_gcc clk_gcc_camss_ahb_clk>, <&clock_gcc clk_gcc_camss_top_ahb_clk>; clock-names = "camss_top_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "camss_ahb_clk", "ispif_ahb_clk"; "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "camss_ahb_clk", "ispif_ahb_clk"; qcom,clock-rates = <40000000 266670000 0 0 0 0 0 0>; qos-entries = <8>; Loading @@ -165,21 +175,26 @@ 0xCCCC1111 0xCCCC1111 0xCCCC1111 0xCCCC1111 0xCCCC1111 0xCCCC1111 0xCCCC1111 0xCCCC1111 0x00000103>; }; bus-util-factor = <1024>; }; qcom,cam_smmu { status = "ok"; compatible = "qcom,msm-cam-smmu"; msm_cam_smmu_cb1: msm_cam_smmu_cb1 { compatible = "qcom,qsmmu-cam-cb"; iommus = <&apps_iommu 0x400>; label = "vfe"; qcom,scratch-buf-support; }; msm_cam_smmu_cb2: msm_cam_smmu_cb2 { compatible = "qcom,qsmmu-cam-cb"; label = "vfe_secure"; qcom,secure-context; }; qcom,irqrouter@1b00000 { status = "ok"; cell-index = <0>; compatible = "qcom,irqrouter"; reg = <0x1b00000 0x100>; reg-names = "irqrouter"; }; }; arch/arm/boot/dts/qcom/msm8909-cdp.dtsi +2 −1 Original line number Diff line number Diff line /* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -12,6 +12,7 @@ #include "msm8909.dtsi" #include "msm8909-pinctrl.dtsi" #include "msm8909-regulator.dtsi" &soc { i2c@78b9000 { /* BLSP1 QUP5 */ Loading arch/arm/boot/dts/qcom/msm8909-mtp.dtsi +2 −0 Original line number Diff line number Diff line Loading @@ -13,6 +13,8 @@ #include "msm8909.dtsi" #include "msm8909-pinctrl.dtsi" #include "msm8909-regulator.dtsi" #include "msm8909-camera-sensor-mtp.dtsi" &soc { /* Loading arch/arm/boot/dts/qcom/msm8909-pinctrl.dtsi +135 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,141 @@ interrupt-controller; #interrupt-cells = <2>; /* sensors */ cam_sensor_mclk0_default: cam_sensor_mclk0_default { /* MCLK0 */ mux { /* CLK, DATA */ pins = "gpio26"; function = "cam_mclk"; }; config { pins = "gpio26"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_mclk0_sleep: cam_sensor_mclk0_sleep { /* MCLK0 */ mux { /* CLK, DATA */ pins = "gpio26"; function = "cam_mclk"; }; config { pins = "gpio26"; bias-pull-down; /* PULL DOWN */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_rear_default: cam_sensor_rear_default { /* RESET, STANDBY */ mux { pins = "gpio35", "gpio34"; function = "gpio"; }; config { pins = "gpio35","gpio34"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_rear_sleep: cam_sensor_rear_sleep { /* RESET, STANDBY */ mux { pins = "gpio35","gpio34"; function = "gpio"; }; config { pins = "gpio35","gpio34"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_mclk1_default: cam_sensor_mclk1_default { /* MCLK1 */ mux { /* CLK, DATA */ pins = "gpio27"; function = "cam_mclk"; }; config { pins = "gpio27"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_mclk1_sleep: cam_sensor_mclk1_sleep { /* MCLK1 */ mux { /* CLK, DATA */ pins = "gpio27"; function = "cam_mclk"; }; config { pins = "gpio27"; bias-pull-down; /* PULL DOWN */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_front_default: cam_sensor_front_default { /* RESET, STANDBY */ mux { pins = "gpio28","gpio33"; function = "gpio"; }; config { pins = "gpio28","gpio33"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_front_sleep: cam_sensor_front_sleep { /* RESET, STANDBY */ mux { pins = "gpio28","gpio33"; function = "gpio"; }; config { pins = "gpio28","gpio33"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_flash { /* FLASH_RESET,FLASH_EN,FLASH_NOW */ qcom,pins = "gpio 36", "gpio 31", "gpio 32"; qcom,num-grp-pins = <3>; qcom,pin-func = <0>; label = "cam_sensor_flash"; /* active state */ cam_sensor_flash_default: default { drive-strength = <2>; /* 2 MA */ bias-disable = <0>; /* No PULL */ }; /* suspended state */ cam_sensor_flash_sleep: sleep { drive-strength = <2>; /* 2 MA */ bias-pull-down = <0>; /* PULL DOWN */ }; }; uart_console_active: uart_console_active { mux { pins = "gpio4", "gpio5"; Loading Loading
arch/arm/boot/dts/qcom/msm8909-camera-sensor-mtp.dtsi +3 −1 Original line number Diff line number Diff line /* * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -187,6 +187,8 @@ "CAM_RESET", "CAM_STANDBY"; qcom,cci-master = <0>; qcom,sensor-position = <1>; qcom,sensor-mode = <0>; status = "ok"; clocks = <&clock_gcc clk_mclk1_clk_src>, <&clock_gcc clk_gcc_camss_mclk1_clk>; Loading
arch/arm/boot/dts/qcom/msm8909-camera.dtsi +40 −25 Original line number Diff line number Diff line /* * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2015, 2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -14,6 +14,11 @@ &soc { qcom,msm-cam@1800000{ compatible = "qcom,msm-cam"; reg = <0x1b00000 0x40000>; reg-names = "msm-cam"; status = "ok"; bus-vectors = "suspend", "svs", "nominal", "turbo"; qcom,bus-votes = <0 320000000 640000000 640000000>; }; qcom,csiphy@1b0ac00 { Loading Loading @@ -96,35 +101,41 @@ reg-names = "ispif", "csi_clk_mux"; interrupts = <0 51 0>; interrupt-names = "ispif"; clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>, qcom,num-isps = <0x1>; vfe0_vdd_supply = <&gdsc_vfe>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_csi0_clk_src>, <&clock_gcc clk_gcc_camss_csi0_clk>, <&clock_gcc clk_gcc_camss_csi0pix_clk>, <&clock_gcc clk_gcc_camss_csi0rdi_clk>, <&clock_gcc clk_gcc_camss_csi0pix_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>; clock-names = "ispif_ahb_clk","camss_ahb_clk", clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi0_src_clk", "csi0_clk", "csi0_pix_clk","csi0_rdi_clk", "csi1_src_clk", "csi1_clk", "csi1_pix_clk", "csi1_rdi_clk", "csi0_rdi_clk", "csi0_pix_clk", "csi1_src_clk", "csi1_clk", "csi1_rdi_clk", "csi1_pix_clk", "vfe0_clk_src", "camss_vfe_vfe0_clk", "camss_csi_vfe0_clk"; qcom,clock-rates = <40000000 0 0 0 0 0 0 0 0 0 0 0 0>; qcom,clock-rates = <0 40000000 200000000 0 0 0 200000000 0 0 0 0 0 0>; qcom,clock-control = "NO_SET_RATE", "SET_RATE", "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE"; }; qcom,vfe { compatible = "qcom,vfe"; #address-cells = <1>; #size-cells = <1>; ranges; vfe0: qcom,vfe0@1b10000 { qcom,vfe@1b10000 { cell-index = <0>; compatible = "qcom,vfe32"; reg = <0x1b10000 0x830>, Loading @@ -142,9 +153,8 @@ <&clock_gcc clk_gcc_camss_ahb_clk>, <&clock_gcc clk_gcc_camss_top_ahb_clk>; clock-names = "camss_top_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "camss_ahb_clk", "ispif_ahb_clk"; "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "camss_ahb_clk", "ispif_ahb_clk"; qcom,clock-rates = <40000000 266670000 0 0 0 0 0 0>; qos-entries = <8>; Loading @@ -165,21 +175,26 @@ 0xCCCC1111 0xCCCC1111 0xCCCC1111 0xCCCC1111 0xCCCC1111 0xCCCC1111 0xCCCC1111 0xCCCC1111 0x00000103>; }; bus-util-factor = <1024>; }; qcom,cam_smmu { status = "ok"; compatible = "qcom,msm-cam-smmu"; msm_cam_smmu_cb1: msm_cam_smmu_cb1 { compatible = "qcom,qsmmu-cam-cb"; iommus = <&apps_iommu 0x400>; label = "vfe"; qcom,scratch-buf-support; }; msm_cam_smmu_cb2: msm_cam_smmu_cb2 { compatible = "qcom,qsmmu-cam-cb"; label = "vfe_secure"; qcom,secure-context; }; qcom,irqrouter@1b00000 { status = "ok"; cell-index = <0>; compatible = "qcom,irqrouter"; reg = <0x1b00000 0x100>; reg-names = "irqrouter"; }; };
arch/arm/boot/dts/qcom/msm8909-cdp.dtsi +2 −1 Original line number Diff line number Diff line /* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -12,6 +12,7 @@ #include "msm8909.dtsi" #include "msm8909-pinctrl.dtsi" #include "msm8909-regulator.dtsi" &soc { i2c@78b9000 { /* BLSP1 QUP5 */ Loading
arch/arm/boot/dts/qcom/msm8909-mtp.dtsi +2 −0 Original line number Diff line number Diff line Loading @@ -13,6 +13,8 @@ #include "msm8909.dtsi" #include "msm8909-pinctrl.dtsi" #include "msm8909-regulator.dtsi" #include "msm8909-camera-sensor-mtp.dtsi" &soc { /* Loading
arch/arm/boot/dts/qcom/msm8909-pinctrl.dtsi +135 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,141 @@ interrupt-controller; #interrupt-cells = <2>; /* sensors */ cam_sensor_mclk0_default: cam_sensor_mclk0_default { /* MCLK0 */ mux { /* CLK, DATA */ pins = "gpio26"; function = "cam_mclk"; }; config { pins = "gpio26"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_mclk0_sleep: cam_sensor_mclk0_sleep { /* MCLK0 */ mux { /* CLK, DATA */ pins = "gpio26"; function = "cam_mclk"; }; config { pins = "gpio26"; bias-pull-down; /* PULL DOWN */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_rear_default: cam_sensor_rear_default { /* RESET, STANDBY */ mux { pins = "gpio35", "gpio34"; function = "gpio"; }; config { pins = "gpio35","gpio34"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_rear_sleep: cam_sensor_rear_sleep { /* RESET, STANDBY */ mux { pins = "gpio35","gpio34"; function = "gpio"; }; config { pins = "gpio35","gpio34"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_mclk1_default: cam_sensor_mclk1_default { /* MCLK1 */ mux { /* CLK, DATA */ pins = "gpio27"; function = "cam_mclk"; }; config { pins = "gpio27"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_mclk1_sleep: cam_sensor_mclk1_sleep { /* MCLK1 */ mux { /* CLK, DATA */ pins = "gpio27"; function = "cam_mclk"; }; config { pins = "gpio27"; bias-pull-down; /* PULL DOWN */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_front_default: cam_sensor_front_default { /* RESET, STANDBY */ mux { pins = "gpio28","gpio33"; function = "gpio"; }; config { pins = "gpio28","gpio33"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_front_sleep: cam_sensor_front_sleep { /* RESET, STANDBY */ mux { pins = "gpio28","gpio33"; function = "gpio"; }; config { pins = "gpio28","gpio33"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; }; cam_sensor_flash { /* FLASH_RESET,FLASH_EN,FLASH_NOW */ qcom,pins = "gpio 36", "gpio 31", "gpio 32"; qcom,num-grp-pins = <3>; qcom,pin-func = <0>; label = "cam_sensor_flash"; /* active state */ cam_sensor_flash_default: default { drive-strength = <2>; /* 2 MA */ bias-disable = <0>; /* No PULL */ }; /* suspended state */ cam_sensor_flash_sleep: sleep { drive-strength = <2>; /* 2 MA */ bias-pull-down = <0>; /* PULL DOWN */ }; }; uart_console_active: uart_console_active { mux { pins = "gpio4", "gpio5"; Loading