Loading arch/arm/boot/dts/qcom/msm8996-cdp.dtsi +25 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,10 @@ }; }; &spi_eth_vreg { status = "ok"; }; &uartblsp2dm1 { status = "ok"; pinctrl-names = "default"; Loading Loading @@ -678,6 +682,15 @@ qcom,invert = <0>; status = "okay"; }; mpp@a400 { /* MPP 5 */ qcom,mode = <1>; /* Digital output */ qcom,output-type = <0>; /* CMOS logic */ qcom,vin-sel = <2>; /* S4 1.8V */ qcom,src-sel = <0>; /* Constant */ qcom,master-en = <1>; /* Enable GPIO */ status = "okay"; }; }; &pmi8994_gpios { Loading Loading @@ -775,3 +788,15 @@ interrupt-names = "silabs_fm_int", "silabs_fm_status_int"; }; }; &spi_0 { ethernet@2 { compatible = "micrel,ks8851"; reg = <2>; interrupt-parent = <&tlmm>; interrupts = <11 0>; spi-max-frequency = <960000>; vdd-supply = <&spi_eth_vreg>; reset-gpios = <&tlmm 79 0>; }; }; arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi +28 −0 Original line number Diff line number Diff line Loading @@ -604,6 +604,34 @@ }; }; spi_0_cs { spi_0_cs_active: spi_0_cs_active { mux { pins = "gpio24", "gpio90"; function = "blsp1_spi"; }; config { pins = "gpio24", "gpio90"; drive-strength = <6>; bias-pull-up; }; }; spi_0_cs_sleep: spi_0_cs_sleep { mux { pins = "gpio24", "gpio90"; function = "blsp1_spi"; }; config { pins = "gpio24", "gpio90"; drive-strength = <6>; bias-pull-up; }; }; }; pcie0 { pcie0_clkreq_default: pcie0_clkreq_default { mux { Loading arch/arm/boot/dts/qcom/msm8996-regulator.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -944,6 +944,14 @@ }; /* Miscellaneous regulators */ spi_eth_vreg: spi_eth_phy_vreg { compatible = "regulator-fixed"; regulator-name = "ethernet_phy"; gpio = <&pm8994_mpps 5 0>; enable-active-high; status = "disabled"; }; usb_otg_switch: usb-otg-switch { compatible = "regulator-fixed"; regulator-name = "usb_otg_vreg"; Loading arch/arm/boot/dts/qcom/msm8996.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -2614,8 +2614,8 @@ qcom,master-id = <86>; qcom,use-pinctrl; pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_0_active>; pinctrl-1 = <&spi_0_sleep>; pinctrl-0 = <&spi_0_active &spi_0_cs_active>; pinctrl-1 = <&spi_0_sleep &spi_0_cs_sleep>; clock-names = "iface_clk", "core_clk"; Loading arch/arm64/configs/msmcortex_defconfig +0 −2 Original line number Diff line number Diff line Loading @@ -446,8 +446,6 @@ CONFIG_MSM_COMMON_LOG=y CONFIG_MSM_DDR_HEALTH=y CONFIG_MSM_WATCHDOG_V2=y CONFIG_MSM_FORCE_WDOG_BITE_ON_PANIC=y CONFIG_MSM_CACHE_M4M_ERP64_PANIC_ON_CE=y CONFIG_MSM_CACHE_M4M_ERP64_PANIC_ON_UE=y CONFIG_MSM_RPM_SMD=y CONFIG_MSM_RPM_LOG=y CONFIG_MSM_RPM_STATS_LOG=y Loading Loading
arch/arm/boot/dts/qcom/msm8996-cdp.dtsi +25 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,10 @@ }; }; &spi_eth_vreg { status = "ok"; }; &uartblsp2dm1 { status = "ok"; pinctrl-names = "default"; Loading Loading @@ -678,6 +682,15 @@ qcom,invert = <0>; status = "okay"; }; mpp@a400 { /* MPP 5 */ qcom,mode = <1>; /* Digital output */ qcom,output-type = <0>; /* CMOS logic */ qcom,vin-sel = <2>; /* S4 1.8V */ qcom,src-sel = <0>; /* Constant */ qcom,master-en = <1>; /* Enable GPIO */ status = "okay"; }; }; &pmi8994_gpios { Loading Loading @@ -775,3 +788,15 @@ interrupt-names = "silabs_fm_int", "silabs_fm_status_int"; }; }; &spi_0 { ethernet@2 { compatible = "micrel,ks8851"; reg = <2>; interrupt-parent = <&tlmm>; interrupts = <11 0>; spi-max-frequency = <960000>; vdd-supply = <&spi_eth_vreg>; reset-gpios = <&tlmm 79 0>; }; };
arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi +28 −0 Original line number Diff line number Diff line Loading @@ -604,6 +604,34 @@ }; }; spi_0_cs { spi_0_cs_active: spi_0_cs_active { mux { pins = "gpio24", "gpio90"; function = "blsp1_spi"; }; config { pins = "gpio24", "gpio90"; drive-strength = <6>; bias-pull-up; }; }; spi_0_cs_sleep: spi_0_cs_sleep { mux { pins = "gpio24", "gpio90"; function = "blsp1_spi"; }; config { pins = "gpio24", "gpio90"; drive-strength = <6>; bias-pull-up; }; }; }; pcie0 { pcie0_clkreq_default: pcie0_clkreq_default { mux { Loading
arch/arm/boot/dts/qcom/msm8996-regulator.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -944,6 +944,14 @@ }; /* Miscellaneous regulators */ spi_eth_vreg: spi_eth_phy_vreg { compatible = "regulator-fixed"; regulator-name = "ethernet_phy"; gpio = <&pm8994_mpps 5 0>; enable-active-high; status = "disabled"; }; usb_otg_switch: usb-otg-switch { compatible = "regulator-fixed"; regulator-name = "usb_otg_vreg"; Loading
arch/arm/boot/dts/qcom/msm8996.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -2614,8 +2614,8 @@ qcom,master-id = <86>; qcom,use-pinctrl; pinctrl-names = "spi_default", "spi_sleep"; pinctrl-0 = <&spi_0_active>; pinctrl-1 = <&spi_0_sleep>; pinctrl-0 = <&spi_0_active &spi_0_cs_active>; pinctrl-1 = <&spi_0_sleep &spi_0_cs_sleep>; clock-names = "iface_clk", "core_clk"; Loading
arch/arm64/configs/msmcortex_defconfig +0 −2 Original line number Diff line number Diff line Loading @@ -446,8 +446,6 @@ CONFIG_MSM_COMMON_LOG=y CONFIG_MSM_DDR_HEALTH=y CONFIG_MSM_WATCHDOG_V2=y CONFIG_MSM_FORCE_WDOG_BITE_ON_PANIC=y CONFIG_MSM_CACHE_M4M_ERP64_PANIC_ON_CE=y CONFIG_MSM_CACHE_M4M_ERP64_PANIC_ON_UE=y CONFIG_MSM_RPM_SMD=y CONFIG_MSM_RPM_LOG=y CONFIG_MSM_RPM_STATS_LOG=y Loading