Merge "msm: vidc: Add control to set csc coefficients to firmware" (a697a17d) · Commits · e / devices / android_kernel_xiaomi_markw

drivers/media/platform/msm/vidc/msm_venc.c

+19 −1

Original line number	Diff line number	Diff line
		@@ -1193,6 +1193,15 @@ static struct msm_vidc_ctrl msm_venc_ctrls[] = {
		.step = 2,
		.qmenu = NULL,
		},
		{
		.id = V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC,
		.name = "Set VPE Color space conversion coefficients",
		.type = V4L2_CTRL_TYPE_INTEGER,
		.minimum = V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_DISABLE,
		.maximum = V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_ENABLE,
		.default_value = V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_DISABLE,
		.step = 1,
		},

		};

		@@ -1312,6 +1321,8 @@ static struct msm_vidc_format venc_formats[] = {
		},
		};

		static int msm_venc_set_csc(struct msm_vidc_inst *inst);

		static int msm_venc_queue_setup(struct vb2_queue *q,
		const struct v4l2_format *fmt,
		unsigned int *num_buffers,
		@@ -3028,6 +3039,13 @@ static int try_set_ctrl(struct msm_vidc_inst inst, struct v4l2_ctrl ctrl)
		pdata = &pic_order_cnt;
		break;
		}
		case V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC:
		if (ctrl->val == V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_ENABLE) {
		rc = msm_venc_set_csc(inst);
		if (rc)
		dprintk(VIDC_ERR, "fail to set csc: %d\n", rc);
		}
		break;
		default:
		dprintk(VIDC_ERR, "Unsupported index: %x\n", ctrl->id);
		rc = -ENOTSUPP;
		@@ -3357,7 +3375,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst inst, struct v4l2_fmtdesc f)
		return rc;
		}

		int msm_venc_set_csc(struct msm_vidc_inst *inst)
		static int msm_venc_set_csc(struct msm_vidc_inst *inst)
		{
		int rc = 0;
		int count = 0;

+8 −0

Original line number	Diff line number	Diff line
		@@ -1119,6 +1119,14 @@ enum v4l2_mpeg_vidc_video_venc_bitrate_type_enable {
		#define V4L2_CID_MPEG_VIDC_VIDEO_H264_PIC_ORDER_CNT \
		(V4L2_CID_MPEG_MSM_VIDC_BASE + 86)

		#define V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC \
		(V4L2_CID_MPEG_MSM_VIDC_BASE + 87)

		enum v4l2_cid_mpeg_vidc_video_vpe_csc_type_enable {
		V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_DISABLE = 0,
		V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_ENABLE = 1
		};

		/* Camera class control IDs */

		#define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA \| 0x900)