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Commit a68b728f authored Apr 03, 2013 by Wenyou Yang Committed by Mark Brown Apr 24, 2013

ARM: dts: add pinctrl property for spi node for atmel SoC



Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

parent b6811e9a

arch/arm/boot/dts/at91sam9260.dtsi

+22 −0

Original line number	Diff line number	Diff line
		@@ -322,6 +322,24 @@
		};
		};

		spi0 {
		pinctrl_spi0: spi0-0 {
		atmel,pins =
		<0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */
		0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */
		0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */
		};
		};

		spi1 {
		pinctrl_spi1: spi1-0 {
		atmel,pins =
		<1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */
		1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */
		1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */
		};
		};

		pioA: gpio@fffff400 {
		compatible = "atmel,at91rm9200-gpio";
		reg = <0xfffff400 0x200>;
		@@ -477,6 +495,8 @@
		compatible = "atmel,at91rm9200-spi";
		reg = <0xfffc8000 0x200>;
		interrupts = <12 4 3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi0>;
		status = "disabled";
		};

		@@ -486,6 +506,8 @@
		compatible = "atmel,at91rm9200-spi";
		reg = <0xfffcc000 0x200>;
		interrupts = <13 4 3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi1>;
		status = "disabled";
		};

arch/arm/boot/dts/at91sam9263.dtsi

+22 −0

Original line number	Diff line number	Diff line
		@@ -303,6 +303,24 @@
		};
		};

		spi0 {
		pinctrl_spi0: spi0-0 {
		atmel,pins =
		<0 0 0x2 0x0 /* PA0 periph B SPI0_MISO pin */
		0 1 0x2 0x0 /* PA1 periph B SPI0_MOSI pin */
		0 2 0x2 0x0>; /* PA2 periph B SPI0_SPCK pin */
		};
		};

		spi1 {
		pinctrl_spi1: spi1-0 {
		atmel,pins =
		<1 12 0x1 0x0 /* PB12 periph A SPI1_MISO pin */
		1 13 0x1 0x0 /* PB13 periph A SPI1_MOSI pin */
		1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */
		};
		};

		pioA: gpio@fffff200 {
		compatible = "atmel,at91rm9200-gpio";
		reg = <0xfffff200 0x200>;
		@@ -469,6 +487,8 @@
		compatible = "atmel,at91rm9200-spi";
		reg = <0xfffa4000 0x200>;
		interrupts = <14 4 3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi0>;
		status = "disabled";
		};

		@@ -478,6 +498,8 @@
		compatible = "atmel,at91rm9200-spi";
		reg = <0xfffa8000 0x200>;
		interrupts = <15 4 3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi1>;
		status = "disabled";
		};
		};

arch/arm/boot/dts/at91sam9g45.dtsi

+22 −0

Original line number	Diff line number	Diff line
		@@ -322,6 +322,24 @@
		};
		};

		spi0 {
		pinctrl_spi0: spi0-0 {
		atmel,pins =
		<1 0 0x1 0x0 /* PB0 periph A SPI0_MISO pin */
		1 1 0x1 0x0 /* PB1 periph A SPI0_MOSI pin */
		1 2 0x1 0x0>; /* PB2 periph A SPI0_SPCK pin */
		};
		};

		spi1 {
		pinctrl_spi1: spi1-0 {
		atmel,pins =
		<1 14 0x1 0x0 /* PB14 periph A SPI1_MISO pin */
		1 15 0x1 0x0 /* PB15 periph A SPI1_MOSI pin */
		1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */
		};
		};

		pioA: gpio@fffff200 {
		compatible = "atmel,at91rm9200-gpio";
		reg = <0xfffff200 0x200>;
		@@ -538,6 +556,8 @@
		compatible = "atmel,at91rm9200-spi";
		reg = <0xfffa4000 0x200>;
		interrupts = <14 4 3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi0>;
		status = "disabled";
		};

		@@ -547,6 +567,8 @@
		compatible = "atmel,at91rm9200-spi";
		reg = <0xfffa8000 0x200>;
		interrupts = <15 4 3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi1>;
		status = "disabled";
		};
		};

arch/arm/boot/dts/at91sam9n12.dtsi

+22 −0

Original line number	Diff line number	Diff line
		@@ -261,6 +261,24 @@
		};
		};

		spi0 {
		pinctrl_spi0: spi0-0 {
		atmel,pins =
		<0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */
		0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */
		0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
		};
		};

		spi1 {
		pinctrl_spi1: spi1-0 {
		atmel,pins =
		<0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */
		0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */
		0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
		};
		};

		pioA: gpio@fffff400 {
		compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
		reg = <0xfffff400 0x200>;
		@@ -380,6 +398,8 @@
		compatible = "atmel,at91rm9200-spi";
		reg = <0xf0000000 0x100>;
		interrupts = <13 4 3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi0>;
		status = "disabled";
		};

		@@ -389,6 +409,8 @@
		compatible = "atmel,at91rm9200-spi";
		reg = <0xf0004000 0x100>;
		interrupts = <14 4 3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi1>;
		status = "disabled";
		};
		};

arch/arm/boot/dts/at91sam9x5.dtsi

+22 −0

Original line number	Diff line number	Diff line
		@@ -319,6 +319,24 @@
		};
		};

		spi0 {
		pinctrl_spi0: spi0-0 {
		atmel,pins =
		<0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */
		0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */
		0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
		};
		};

		spi1 {
		pinctrl_spi1: spi1-0 {
		atmel,pins =
		<0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */
		0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */
		0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
		};
		};

		pioA: gpio@fffff400 {
		compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
		reg = <0xfffff400 0x200>;
		@@ -512,6 +530,8 @@
		compatible = "atmel,at91rm9200-spi";
		reg = <0xf0000000 0x100>;
		interrupts = <13 4 3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi0>;
		status = "disabled";
		};

		@@ -521,6 +541,8 @@
		compatible = "atmel,at91rm9200-spi";
		reg = <0xf0004000 0x100>;
		interrupts = <14 4 3>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi1>;
		status = "disabled";
		};
		};