Loading Documentation/devicetree/bindings/usb/msm-phy.txt +1 −1 Original line number Diff line number Diff line Loading @@ -146,7 +146,7 @@ Required properties: - clocks: a list of phandles to the PHY clocks. Use as per Documentation/devicetree/bindings/clock/clock-bindings.txt - clock-names: Names of the clocks in 1-1 correspondence with the "clocks" property. Required clocks are "ref_clk_src", "ref_clk", "cfg_ahb_clk" and "phy_reset". property. Required clocks are "ref_clk_src", "cfg_ahb_clk" and "phy_reset". - phy_type: Should be one of "ulpi" or "utmi". ChipIdea core uses "ulpi" mode. Optional properties: Loading arch/arm/boot/dts/qcom/mdm9640.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -800,7 +800,7 @@ <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>, <&clock_gcc clk_gcc_qusb2a_phy_reset>; clock-names = "ref_clk", "cfg_ahb_clk", "phy_reset"; clock-names = "ref_clk_src", "cfg_ahb_clk", "phy_reset"; }; ssphy: ssphy@78000 { Loading drivers/usb/phy/phy-msm-qusb.c +3 −2 Original line number Diff line number Diff line Loading @@ -826,7 +826,8 @@ static int qusb_phy_probe(struct platform_device *pdev) return PTR_ERR(qphy->ref_clk_src); qphy->ref_clk = devm_clk_get(dev, "ref_clk"); if (IS_ERR(qphy->ref_clk)) return PTR_ERR(qphy->ref_clk); dev_dbg(dev, "clk get failed for ref_clk\n"); else clk_set_rate(qphy->ref_clk, 19200000); qphy->cfg_ahb_clk = devm_clk_get(dev, "cfg_ahb_clk"); Loading Loading
Documentation/devicetree/bindings/usb/msm-phy.txt +1 −1 Original line number Diff line number Diff line Loading @@ -146,7 +146,7 @@ Required properties: - clocks: a list of phandles to the PHY clocks. Use as per Documentation/devicetree/bindings/clock/clock-bindings.txt - clock-names: Names of the clocks in 1-1 correspondence with the "clocks" property. Required clocks are "ref_clk_src", "ref_clk", "cfg_ahb_clk" and "phy_reset". property. Required clocks are "ref_clk_src", "cfg_ahb_clk" and "phy_reset". - phy_type: Should be one of "ulpi" or "utmi". ChipIdea core uses "ulpi" mode. Optional properties: Loading
arch/arm/boot/dts/qcom/mdm9640.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -800,7 +800,7 @@ <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>, <&clock_gcc clk_gcc_qusb2a_phy_reset>; clock-names = "ref_clk", "cfg_ahb_clk", "phy_reset"; clock-names = "ref_clk_src", "cfg_ahb_clk", "phy_reset"; }; ssphy: ssphy@78000 { Loading
drivers/usb/phy/phy-msm-qusb.c +3 −2 Original line number Diff line number Diff line Loading @@ -826,7 +826,8 @@ static int qusb_phy_probe(struct platform_device *pdev) return PTR_ERR(qphy->ref_clk_src); qphy->ref_clk = devm_clk_get(dev, "ref_clk"); if (IS_ERR(qphy->ref_clk)) return PTR_ERR(qphy->ref_clk); dev_dbg(dev, "clk get failed for ref_clk\n"); else clk_set_rate(qphy->ref_clk, 19200000); qphy->cfg_ahb_clk = devm_clk_get(dev, "cfg_ahb_clk"); Loading