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Commit a5bf5f5a authored by Tejun Heo's avatar Tejun Heo Committed by Jeff Garzik
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ata_piix: fix pio/mwdma programming 



Fix various bugs in pio/mwdma mode programming.

* Control bits in the timing register wasn't cleared properly while
  programming PIO mode.

* MWDMA mode programming cleared the wrong part of control bits.

* MWDMA mode programming cleared udma_mask even when the controller
  doesn't support UDMA.

Signed-off-by: default avatarTejun Heo <htejun@gmail.com>
Cc: Art Haas <ahaas@airmail.net>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent dab632e8

drivers/ata/ata_piix.c

+17 −6
Original line number Diff line number Diff line
@@ -685,8 +685,14 @@ static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev) 
	if (adev->class == ATA_DEV_ATA)

		control |= 4;	/* PPE enable */



	/* PIO configuration clears DTE unconditionally.  It will be

	 * programmed in set_dmamode which is guaranteed to be called

	 * after set_piomode if any DMA mode is available.

	 */

	pci_read_config_word(dev, master_port, &master_data);

	if (is_slave) {

		/* clear TIME1|IE1|PPE1|DTE1 */

		master_data &= 0xff0f;

		/* Enable SITRE (seperate slave timing register) */

		master_data |= 0x4000;

		/* enable PPE1, IE1 and TIME1 as needed */
@@ -694,12 +700,14 @@ static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev) 
		pci_read_config_byte(dev, slave_port, &slave_data);

		slave_data &= (ap->port_no ? 0x0f : 0xf0);

		/* Load the timing nibble for this slave */

		slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);

		slave_data |= ((timings[pio][0] << 2) | timings[pio][1])

						<< (ap->port_no ? 4 : 0);

	} else {

		/* Master keeps the bits in a different format */

		master_data &= 0xccf8;

		/* clear ISP|RCT|TIME0|IE0|PPE0|DTE0 */

		master_data &= 0xccf0;

		/* Enable PPE, IE and TIME as appropriate */

		master_data |= control;

		/* load ISP and RCT */

		master_data |=

			(timings[pio][0] << 12) |

			(timings[pio][1] << 8);
@@ -816,7 +824,7 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i 
			master_data &= 0xFF4F;  /* Mask out IORDY|TIME1|DMAONLY */

			master_data |= control << 4;

			pci_read_config_byte(dev, 0x44, &slave_data);

			slave_data &= (0x0F + 0xE1 * ap->port_no);

			slave_data &= (ap->port_no ? 0x0f : 0xf0);

			/* Load the matching timing */

			slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);

			pci_write_config_byte(dev, 0x44, slave_data);
@@ -828,9 +836,12 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i 
				(timings[pio][0] << 12) |

				(timings[pio][1] << 8);

		}



		if (ap->udma_mask) {

			udma_enable &= ~(1 << devid);

			pci_write_config_word(dev, master_port, master_data);

		}

	}

	/* Don't scribble on 0x48 if the controller does not support UDMA */

	if (ap->udma_mask)

		pci_write_config_byte(dev, 0x48, udma_enable);