Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a54dfb1a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'dt-for-3.7' of git://sources.calxeda.com/kernel/linux 

Pull devicetree updates from Rob Herring:
 - Import of latest upstream device tree compiler (dtc)
 - New function of_get_child_by_name
 - Support for #size-cells of 0 and #addr-cells of >2
 - Couple of DT binding documentation updates

Fix up trivial conflicts due to of_get_child_by_name() having been added
next to the new of_get_next_available_child().

* tag 'dt-for-3.7' of git://sources.calxeda.com/kernel/linux:
  MAINTAINERS: add scripts/dtc under Devicetree maintainers
  dtc: import latest upstream dtc
  dt: Document general interrupt controller bindings
  dt/s3c64xx/spi: Use of_get_child_by_name to get a named child
  dt: introduce of_get_child_by_name to get child node by name
  of: i2c: add support for wakeup-source property
  of/address: Handle #address-cells > 2 specially
  DT: export of_irq_to_resource_table()
  devicetree: serial: Add documentation for imx serial
  devicetree: pwm: mxs-pwm.txt: Fix reg field annotation
  of: Allow busses with #size-cells=0
parents eb0ad9c0 36165f55

Documentation/devicetree/bindings/interrupt-controller/interrupts.txt

0 → 100644
+95 −0
Original line number Diff line number Diff line 
Specifying interrupt information for devices

============================================



1) Interrupt client nodes

-------------------------



Nodes that describe devices which generate interrupts must contain an

"interrupts" property. This property must contain a list of interrupt

specifiers, one per output interrupt. The format of the interrupt specifier is

determined by the interrupt controller to which the interrupts are routed; see

section 2 below for details.



The "interrupt-parent" property is used to specify the controller to which

interrupts are routed and contains a single phandle referring to the interrupt

controller node. This property is inherited, so it may be specified in an

interrupt client node or in any of its parent nodes.



2) Interrupt controller nodes

-----------------------------



A device is marked as an interrupt controller with the "interrupt-controller"

property. This is a empty, boolean property. An additional "#interrupt-cells"

property defines the number of cells needed to specify a single interrupt.



It is the responsibility of the interrupt controller's binding to define the

length and format of the interrupt specifier. The following two variants are

commonly used:



  a) one cell

  -----------

  The #interrupt-cells property is set to 1 and the single cell defines the

  index of the interrupt within the controller.



  Example:



	vic: intc@10140000 {

		compatible = "arm,versatile-vic";

		interrupt-controller;

		#interrupt-cells = <1>;

		reg = <0x10140000 0x1000>;

	};



	sic: intc@10003000 {

		compatible = "arm,versatile-sic";

		interrupt-controller;

		#interrupt-cells = <1>;

		reg = <0x10003000 0x1000>;

		interrupt-parent = <&vic>;

		interrupts = <31>; /* Cascaded to vic */

	};



  b) two cells

  ------------

  The #interrupt-cells property is set to 2 and the first cell defines the

  index of the interrupt within the controller, while the second cell is used

  to specify any of the following flags:

    - bits[3:0] trigger type and level flags

        1 = low-to-high edge triggered

        2 = high-to-low edge triggered

        4 = active high level-sensitive

        8 = active low level-sensitive



  Example:



	i2c@7000c000 {

		gpioext: gpio-adnp@41 {

			compatible = "ad,gpio-adnp";

			reg = <0x41>;



			interrupt-parent = <&gpio>;

			interrupts = <160 1>;



			gpio-controller;

			#gpio-cells = <1>;



			interrupt-controller;

			#interrupt-cells = <2>;



			nr-gpios = <64>;

		};



		sx8634@2b {

			compatible = "smtc,sx8634";

			reg = <0x2b>;



			interrupt-parent = <&gpioext>;

			interrupts = <3 0x8>;



			#address-cells = <1>;

			#size-cells = <0>;



			threshold = <0x40>;

			sensitivity = <7>;

		};

	};

Documentation/devicetree/bindings/pwm/mxs-pwm.txt

+1 −1
Original line number Diff line number Diff line
@@ -11,7 +11,7 @@ Example: 


pwm: pwm@80064000 {

	compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";

	reg = <0x80064000 2000>;

	reg = <0x80064000 0x2000>;

	#pwm-cells = <2>;

	fsl,pwm-number = <8>;

};

Documentation/devicetree/bindings/serial/fsl-imx-uart.txt

0 → 100644
+35 −0
Original line number Diff line number Diff line 
* Freescale i.MX UART controller



Required properties:

- compatible : should be "fsl,imx21-uart"

- reg : Address and length of the register set for the device

- interrupts : Should contain UART interrupt number



Optional properties:

- fsl,uart-has-rtscts: indicate that RTS/CTS signals are used



Note: Each uart controller should have an alias correctly numbered

in "aliases" node.



Example:



- From imx51.dtsi:

aliases {

	serial0 = &uart1;

	serial1 = &uart2;

	serial2 = &uart3;

};



uart1: serial@73fbc000 {

	compatible = "fsl,imx51-uart", "fsl,imx21-uart";

	reg = <0x73fbc000 0x4000>;

	interrupts = <31>;

	status = "disabled";

}



- From imx51-babbage.dts:

uart1: serial@73fbc000 {

	fsl,uart-has-rtscts;

	status = "okay";

};

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -5067,6 +5067,7 @@ S: Maintained 
F:	Documentation/devicetree

F:	drivers/of

F:	include/linux/of*.h

F:	scripts/dtc

K:	of_get_property

K:	of_match_table

drivers/of/address.c

+31 −4
Original line number Diff line number Diff line
@@ -9,8 +9,8 @@ 


/* Max address size we deal with */

#define OF_MAX_ADDR_CELLS	4

#define OF_CHECK_COUNTS(na, ns)	((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \

			(ns) > 0)

#define OF_CHECK_ADDR_COUNT(na)	((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)

#define OF_CHECK_COUNTS(na, ns)	(OF_CHECK_ADDR_COUNT(na) && (ns) > 0)



static struct of_bus *of_match_bus(struct device_node *np);

static int __of_address_to_resource(struct device_node *dev,
@@ -69,6 +69,14 @@ static u64 of_bus_default_map(u32 *addr, const __be32 *range, 
		 (unsigned long long)cp, (unsigned long long)s,

		 (unsigned long long)da);



	/*

	 * If the number of address cells is larger than 2 we assume the

	 * mapping doesn't specify a physical address. Rather, the address

	 * specifies an identifier that must match exactly.

	 */

	if (na > 2 && memcmp(range, addr, na * 4) != 0)

		return OF_BAD_ADDR;



	if (da < cp || da >= (cp + s))

		return OF_BAD_ADDR;

	return da - cp;
@@ -182,7 +190,7 @@ const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, 
	}

	bus->count_cells(dev, &na, &ns);

	of_node_put(parent);

	if (!OF_CHECK_COUNTS(na, ns))

	if (!OF_CHECK_ADDR_COUNT(na))

		return NULL;



	/* Get "reg" or "assigned-addresses" property */
@@ -490,6 +498,25 @@ u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) 
}

EXPORT_SYMBOL(of_translate_dma_address);



bool of_can_translate_address(struct device_node *dev)

{

	struct device_node *parent;

	struct of_bus *bus;

	int na, ns;



	parent = of_get_parent(dev);

	if (parent == NULL)

		return false;



	bus = of_match_bus(parent);

	bus->count_cells(dev, &na, &ns);



	of_node_put(parent);



	return OF_CHECK_COUNTS(na, ns);

}

EXPORT_SYMBOL(of_can_translate_address);



const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,

		    unsigned int *flags)

{
@@ -506,7 +533,7 @@ const __be32 *of_get_address(struct device_node *dev, int index, u64 *size, 
	bus = of_match_bus(parent);

	bus->count_cells(dev, &na, &ns);

	of_node_put(parent);

	if (!OF_CHECK_COUNTS(na, ns))

	if (!OF_CHECK_ADDR_COUNT(na))

		return NULL;



	/* Get "reg" or "assigned-addresses" property */