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Commit a50d7156 authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull irq fixes from Thomas Gleixner:
 "Two fixlets for the armada SoC interrupt controller"

* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip: armada-370-xp: Fix MPIC interrupt handling
  irqchip: armada-370-xp: Fix MSI interrupt handling
parents ae04e1ca 758e8366

drivers/irqchip/irq-armada-370-xp.c

+17 −6
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ 
#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS	(0x34)

#define ARMADA_370_XP_INT_SOURCE_CTL(irq)	(0x100 + irq*4)

#define ARMADA_370_XP_INT_SOURCE_CPU_MASK	0xF

#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid)	((BIT(0) | BIT(8)) << cpuid)



#define ARMADA_370_XP_CPU_INTACK_OFFS		(0x44)

#define ARMADA_375_PPI_CAUSE			(0x10)
@@ -406,19 +407,29 @@ static void armada_370_xp_mpic_handle_cascade_irq(unsigned int irq, 
						  struct irq_desc *desc)

{

	struct irq_chip *chip = irq_get_chip(irq);

	unsigned long irqmap, irqn;

	unsigned long irqmap, irqn, irqsrc, cpuid;

	unsigned int cascade_irq;



	chained_irq_enter(chip, desc);



	irqmap = readl_relaxed(per_cpu_int_base + ARMADA_375_PPI_CAUSE);

	cpuid = cpu_logical_map(smp_processor_id());



	if (irqmap & BIT(0)) {

	for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) {

		irqsrc = readl_relaxed(main_int_base +

				       ARMADA_370_XP_INT_SOURCE_CTL(irqn));



		/* Check if the interrupt is not masked on current CPU.

		 * Test IRQ (0-1) and FIQ (8-9) mask bits.

		 */

		if (!(irqsrc & ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid)))

			continue;



		if (irqn == 1) {

			armada_370_xp_handle_msi_irq(NULL, true);

		irqmap &= ~BIT(0);

			continue;

		}



	for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) {

		cascade_irq = irq_find_mapping(armada_370_xp_mpic_domain, irqn);

		generic_handle_irq(cascade_irq);

	}