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Commit a50522d0 authored by Konstantin Motov's avatar Konstantin Motov Committed by Senthil Kumar Rajagopal
Browse files

msm: camera: add support for frame drop 



Drop frame request and report error to user space if
reg update is missing.

Change-Id: Ie5b1bf265e12e8e5da676ac93de8b044fd63cc17
Signed-off-by: default avatarKonstantin Motov <kmotov@codeaurora.org>
parent 1b594d62

drivers/media/platform/msm/camera_v2/isp/msm_isp.c

+1 −0
Original line number Diff line number Diff line
@@ -507,6 +507,7 @@ static int vfe_probe(struct platform_device *pdev) 
	mutex_init(&vfe_dev->buf_mgr_mutex);

	spin_lock_init(&vfe_dev->tasklet_lock);

	spin_lock_init(&vfe_dev->shared_data_lock);

	spin_lock_init(&vfe_dev->reg_update_lock);

	spin_lock_init(&req_history_lock);

	media_entity_init(&vfe_dev->subdev.sd.entity, 0, NULL, 0);

	vfe_dev->subdev.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;

drivers/media/platform/msm/camera_v2/isp/msm_isp.h

+6 −3
Original line number Diff line number Diff line
@@ -376,6 +376,7 @@ struct msm_vfe_src_info { 
	uint32_t input_format;/*V4L2 pix format with bayer pattern*/

	uint32_t last_updt_frm_id;

	uint32_t sof_counter_step;

	struct timeval time_stamp;

};



struct msm_vfe_fetch_engine_info {
@@ -398,7 +399,6 @@ struct msm_vfe_axi_shared_data { 
	uint32_t free_wm[MAX_NUM_WM];

	uint32_t wm_image_size[MAX_NUM_WM];

	enum msm_wm_ub_cfg_type wm_ub_cfg_policy;

	uint8_t reg_update_requested;

	uint8_t num_used_wm;

	uint8_t num_active_stream;

	uint8_t num_rdi_stream;
@@ -599,6 +599,7 @@ struct vfe_device { 
	uint8_t taskletq_idx;

	spinlock_t tasklet_lock;

	spinlock_t shared_data_lock;

	spinlock_t reg_update_lock;

	struct list_head tasklet_q;

	struct tasklet_struct vfe_tasklet;

	struct msm_vfe_tasklet_queue_cmd
@@ -629,6 +630,8 @@ struct vfe_device { 
	uint32_t isp_raw2_debug;

	uint8_t reset_pending;

	enum msm_vfe_hvx_streaming_cmd hvx_cmd;

	uint8_t reg_update_requested;

	uint8_t reg_updated;

};



#endif

drivers/media/platform/msm/camera_v2/isp/msm_isp40.c

+17 −3
Original line number Diff line number Diff line
@@ -648,6 +648,8 @@ static void msm_vfe40_process_reg_update(struct vfe_device *vfe_dev, 
{

	enum msm_vfe_input_src i;

	uint32_t shift_irq;

	uint8_t reg_updated = 0;

	unsigned long flags;



	if (!(irq_status0 & 0xF0))

		return;
@@ -656,7 +658,7 @@ static void msm_vfe40_process_reg_update(struct vfe_device *vfe_dev, 


	for (i = VFE_PIX_0; i <= VFE_RAW_2; i++) {

		if (shift_irq & BIT(i)) {

			vfe_dev->axi_data.reg_update_requested &= ~BIT(i);

			reg_updated |= BIT(i);

			ISP_DBG("%s update_mask %x\n", __func__,

				(uint32_t)BIT(i));

			switch (i) {
@@ -696,12 +698,21 @@ static void msm_vfe40_process_reg_update(struct vfe_device *vfe_dev, 
			}

		}

	}



	spin_lock_irqsave(&vfe_dev->reg_update_lock, flags);

	if (vfe_dev->reg_update_requested == reg_updated)

		vfe_dev->reg_updated = 1;



	vfe_dev->reg_update_requested &= ~reg_updated;

	spin_unlock_irqrestore(&vfe_dev->reg_update_lock, flags);

}



static void msm_vfe40_reg_update(struct vfe_device *vfe_dev,

	enum msm_vfe_input_src frame_src)

{

	uint32_t update_mask = 0;

	unsigned long flags;



	/* This HW supports upto VFE_RAW_2 */

	if (frame_src > VFE_RAW_2 && frame_src != VFE_SRC_MAX) {

		pr_err("%s Error case\n", __func__);
@@ -717,9 +728,12 @@ static void msm_vfe40_reg_update(struct vfe_device *vfe_dev, 
	else

		update_mask = BIT((uint32_t)frame_src);

	ISP_DBG("%s update_mask %x\n", __func__, update_mask);

	vfe_dev->axi_data.reg_update_requested |= update_mask;

	msm_camera_io_w_mb(vfe_dev->axi_data.reg_update_requested,



	spin_lock_irqsave(&vfe_dev->reg_update_lock, flags);

	vfe_dev->reg_update_requested |= update_mask;

	msm_camera_io_w_mb(vfe_dev->reg_update_requested,

		vfe_dev->vfe_base + 0x378);

	spin_unlock_irqrestore(&vfe_dev->reg_update_lock, flags);

}



static void msm_vfe40_process_epoch_irq(struct vfe_device *vfe_dev,

drivers/media/platform/msm/camera_v2/isp/msm_isp44.c

+17 −3
Original line number Diff line number Diff line
@@ -496,6 +496,8 @@ static void msm_vfe44_process_reg_update(struct vfe_device *vfe_dev, 
{

	enum msm_vfe_input_src i;

	uint32_t shift_irq;

	uint8_t reg_updated = 0;

	unsigned long flags;



	if (!(irq_status0 & 0xF0))

		return;
@@ -504,7 +506,7 @@ static void msm_vfe44_process_reg_update(struct vfe_device *vfe_dev, 


	for (i = VFE_PIX_0; i <= VFE_RAW_2; i++) {

		if (shift_irq & BIT(i)) {

			vfe_dev->axi_data.reg_update_requested &= ~BIT(i);

			reg_updated |= BIT(i);

			ISP_DBG("%s update_mask %x\n", __func__,

				(uint32_t)BIT(i));

			switch (i) {
@@ -544,6 +546,13 @@ static void msm_vfe44_process_reg_update(struct vfe_device *vfe_dev, 
			}

		}

	}



	spin_lock_irqsave(&vfe_dev->reg_update_lock, flags);

	if (vfe_dev->reg_update_requested == reg_updated)

		vfe_dev->reg_updated = 1;



	vfe_dev->reg_update_requested &= ~reg_updated;

	spin_unlock_irqrestore(&vfe_dev->reg_update_lock, flags);

}



static void msm_vfe44_process_epoch_irq(struct vfe_device *vfe_dev,
@@ -576,6 +585,8 @@ static void msm_vfe44_reg_update(struct vfe_device *vfe_dev, 
	enum msm_vfe_input_src frame_src)

{

	uint32_t update_mask = 0;

	unsigned long flags;



	/* This HW supports upto VFE_RAW_2 */

	if (frame_src > VFE_RAW_2 && frame_src != VFE_SRC_MAX) {

		pr_err("%s Error case\n", __func__);
@@ -590,9 +601,12 @@ static void msm_vfe44_reg_update(struct vfe_device *vfe_dev, 
		update_mask = 0xF;

	else

		update_mask = BIT((uint32_t)frame_src);

	vfe_dev->axi_data.reg_update_requested |= update_mask;

	msm_camera_io_w_mb(vfe_dev->axi_data.reg_update_requested,



	spin_lock_irqsave(&vfe_dev->reg_update_lock, flags);

	vfe_dev->reg_update_requested |= update_mask;

	msm_camera_io_w_mb(vfe_dev->reg_update_requested,

		vfe_dev->vfe_base + 0x378);

	spin_unlock_irqrestore(&vfe_dev->reg_update_lock, flags);

}



static long msm_vfe44_reset_hardware(struct vfe_device *vfe_dev,

drivers/media/platform/msm/camera_v2/isp/msm_isp46.c

+16 −3
Original line number Diff line number Diff line
@@ -424,6 +424,8 @@ static void msm_vfe46_process_reg_update(struct vfe_device *vfe_dev, 
{

	enum msm_vfe_input_src i;

	uint32_t shift_irq;

	uint8_t reg_updated = 0;

	unsigned long flags;



	if (!(irq_status0 & 0xF0))

		return;
@@ -432,7 +434,7 @@ static void msm_vfe46_process_reg_update(struct vfe_device *vfe_dev, 


	for (i = VFE_PIX_0; i <= VFE_RAW_2; i++) {

		if (shift_irq & BIT(i)) {

			vfe_dev->axi_data.reg_update_requested &= ~BIT(i);

			reg_updated |= BIT(i);

			ISP_DBG("%s update_mask %x\n", __func__,

				(uint32_t)BIT(i));

			switch (i) {
@@ -472,6 +474,13 @@ static void msm_vfe46_process_reg_update(struct vfe_device *vfe_dev, 
			}

		}

	}



	spin_lock_irqsave(&vfe_dev->reg_update_lock, flags);

	if (vfe_dev->reg_update_requested == reg_updated)

		vfe_dev->reg_updated = 1;



	vfe_dev->reg_update_requested &= ~reg_updated;

	spin_unlock_irqrestore(&vfe_dev->reg_update_lock, flags);

}



static void msm_vfe46_process_epoch_irq(struct vfe_device *vfe_dev,
@@ -502,6 +511,8 @@ static void msm_vfe46_reg_update(struct vfe_device *vfe_dev, 
	enum msm_vfe_input_src frame_src)

{

	uint32_t update_mask = 0;

	unsigned long flags;



	/* This HW supports upto VFE_RAW_2 */

	if (frame_src > VFE_RAW_2 && frame_src != VFE_SRC_MAX) {

		pr_err("%s Error case\n", __func__);
@@ -518,9 +529,11 @@ static void msm_vfe46_reg_update(struct vfe_device *vfe_dev, 
		update_mask = BIT((uint32_t)frame_src);

	ISP_DBG("%s update_mask %x\n", __func__, update_mask);



	vfe_dev->axi_data.reg_update_requested |= update_mask;

	msm_camera_io_w_mb(vfe_dev->axi_data.reg_update_requested,

	spin_lock_irqsave(&vfe_dev->reg_update_lock, flags);

	vfe_dev->reg_update_requested |= update_mask;

	msm_camera_io_w_mb(vfe_dev->reg_update_requested,

		vfe_dev->vfe_base + 0x3D8);

	spin_unlock_irqrestore(&vfe_dev->reg_update_lock, flags);

}



static long msm_vfe46_reset_hardware(struct vfe_device *vfe_dev,