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Commit a4d39e68 authored by Rafał Miłecki's avatar Rafał Miłecki Committed by Alex Deucher
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drm/radeon: use loop for initializing AFMT blocks 



Signed-off-by: default avatarRafał Miłecki <zajec5@gmail.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d105f476

drivers/gpu/drm/radeon/radeon_display.c

+23 −30
Original line number Diff line number Diff line
@@ -1257,38 +1257,31 @@ static void radeon_afmt_init(struct radeon_device *rdev) 
	if (ASIC_IS_DCE6(rdev)) {

		/* todo */

	} else if (ASIC_IS_DCE4(rdev)) {

		static uint32_t eg_offsets[] = {

			EVERGREEN_CRTC0_REGISTER_OFFSET,

			EVERGREEN_CRTC1_REGISTER_OFFSET,

			EVERGREEN_CRTC2_REGISTER_OFFSET,

			EVERGREEN_CRTC3_REGISTER_OFFSET,

			EVERGREEN_CRTC4_REGISTER_OFFSET,

			EVERGREEN_CRTC5_REGISTER_OFFSET,

		};

		int num_afmt;



		/* DCE4/5 has 6 audio blocks tied to DIG encoders */

		/* DCE4.1 has 2 audio blocks tied to DIG encoders */

		rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);

		if (rdev->mode_info.afmt[0]) {

			rdev->mode_info.afmt[0]->offset = EVERGREEN_CRTC0_REGISTER_OFFSET;

			rdev->mode_info.afmt[0]->id = 0;

		}

		rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);

		if (rdev->mode_info.afmt[1]) {

			rdev->mode_info.afmt[1]->offset = EVERGREEN_CRTC1_REGISTER_OFFSET;

			rdev->mode_info.afmt[1]->id = 1;

		}

		if (!ASIC_IS_DCE41(rdev)) {

			rdev->mode_info.afmt[2] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);

			if (rdev->mode_info.afmt[2]) {

				rdev->mode_info.afmt[2]->offset = EVERGREEN_CRTC2_REGISTER_OFFSET;

				rdev->mode_info.afmt[2]->id = 2;

			}

			rdev->mode_info.afmt[3] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);

			if (rdev->mode_info.afmt[3]) {

				rdev->mode_info.afmt[3]->offset = EVERGREEN_CRTC3_REGISTER_OFFSET;

				rdev->mode_info.afmt[3]->id = 3;

			}

			rdev->mode_info.afmt[4] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);

			if (rdev->mode_info.afmt[4]) {

				rdev->mode_info.afmt[4]->offset = EVERGREEN_CRTC4_REGISTER_OFFSET;

				rdev->mode_info.afmt[4]->id = 4;

			}

			rdev->mode_info.afmt[5] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);

			if (rdev->mode_info.afmt[5]) {

				rdev->mode_info.afmt[5]->offset = EVERGREEN_CRTC5_REGISTER_OFFSET;

				rdev->mode_info.afmt[5]->id = 5;

		if (ASIC_IS_DCE5(rdev))

			num_afmt = 6;

		else if (ASIC_IS_DCE41(rdev))

			num_afmt = 2;

		else /* DCE4 */

			num_afmt = 6;



		BUG_ON(num_afmt > ARRAY_SIZE(eg_offsets));

		for (i = 0; i < num_afmt; i++) {

			rdev->mode_info.afmt[i] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);

			if (rdev->mode_info.afmt[i]) {

				rdev->mode_info.afmt[i]->offset = eg_offsets[i];

				rdev->mode_info.afmt[i]->id = i;

			}

		}

	} else if (ASIC_IS_DCE3(rdev)) {