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Commit a3ab4ec7 authored by Pratik Patel's avatar Pratik Patel Committed by Shashank Mittal
Browse files

coresight-etm4x: Controls pertaining to the ViewInst register 



Adding sysfs entries to control the ViewInst register's event
selector along with secure and non-secure exception level
instruction tracing.

Change-Id: I53a834f3437f639ccb75989003f2add4aaa4f9b3
Signed-off-by: default avatarPratik Patel <pratikp@codeaurora.org>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Git-commit: 43ba6a7b00ebca1f95bd5a64ceed4f3bae8aeca4
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git


Signed-off-by: default avatarShashank Mittal <mittals@codeaurora.org>
parent 0067b4c1

Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x

+20 −0
Original line number Diff line number Diff line
@@ -134,3 +134,23 @@ KernelVersion: 4.01 
Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description: 	(RW) Controls which regions in the memory map are enabled to

		use branch broadcasting.



What:		/sys/bus/coresight/devices/<memory_map>.etm/event_vinst

Date:		April 2015

KernelVersion:	4.01

Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description: 	(RW) Controls instruction trace filtering.



What:		/sys/bus/coresight/devices/<memory_map>.etm/s_exlevel_vinst

Date:		April 2015

KernelVersion:	4.01

Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description: 	(RW) In Secure state, each bit controls whether instruction

		tracing is enabled for the corresponding exception level.



What:		/sys/bus/coresight/devices/<memory_map>.etm/ns_exlevel_vinst

Date:		April 2015

KernelVersion:	4.01

Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description: 	(RW) In non-secure state, each bit controls whether instruction

		tracing is enabled for the corresponding exception level.

drivers/hwtracing/coresight/coresight-etm4x.c

+98 −0
Original line number Diff line number Diff line
@@ -932,6 +932,101 @@ static ssize_t bb_ctrl_store(struct device *dev, 
}

static DEVICE_ATTR_RW(bb_ctrl);



static ssize_t event_vinst_show(struct device *dev,

				struct device_attribute *attr,

				char *buf)

{

	unsigned long val;

	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);



	val = drvdata->vinst_ctrl & ETMv4_EVENT_MASK;

	return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);

}



static ssize_t event_vinst_store(struct device *dev,

				 struct device_attribute *attr,

				 const char *buf, size_t size)

{

	unsigned long val;

	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);



	if (kstrtoul(buf, 16, &val))

		return -EINVAL;



	spin_lock(&drvdata->spinlock);

	val &= ETMv4_EVENT_MASK;

	drvdata->vinst_ctrl &= ~ETMv4_EVENT_MASK;

	drvdata->vinst_ctrl |= val;

	spin_unlock(&drvdata->spinlock);

	return size;

}

static DEVICE_ATTR_RW(event_vinst);



static ssize_t s_exlevel_vinst_show(struct device *dev,

				    struct device_attribute *attr,

				    char *buf)

{

	unsigned long val;

	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);



	val = BMVAL(drvdata->vinst_ctrl, 16, 19);

	return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);

}



static ssize_t s_exlevel_vinst_store(struct device *dev,

				     struct device_attribute *attr,

				     const char *buf, size_t size)

{

	unsigned long val;

	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);



	if (kstrtoul(buf, 16, &val))

		return -EINVAL;



	spin_lock(&drvdata->spinlock);

	/* clear all EXLEVEL_S bits (bit[18] is never implemented) */

	drvdata->vinst_ctrl &= ~(BIT(16) | BIT(17) | BIT(19));

	/* enable instruction tracing for corresponding exception level */

	val &= drvdata->s_ex_level;

	drvdata->vinst_ctrl |= (val << 16);

	spin_unlock(&drvdata->spinlock);

	return size;

}

static DEVICE_ATTR_RW(s_exlevel_vinst);



static ssize_t ns_exlevel_vinst_show(struct device *dev,

				     struct device_attribute *attr,

				     char *buf)

{

	unsigned long val;

	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);



	/* EXLEVEL_NS, bits[23:20] */

	val = BMVAL(drvdata->vinst_ctrl, 20, 23);

	return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);

}



static ssize_t ns_exlevel_vinst_store(struct device *dev,

				      struct device_attribute *attr,

				      const char *buf, size_t size)

{

	unsigned long val;

	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);



	if (kstrtoul(buf, 16, &val))

		return -EINVAL;



	spin_lock(&drvdata->spinlock);

	/* clear EXLEVEL_NS bits (bit[23] is never implemented */

	drvdata->vinst_ctrl &= ~(BIT(20) | BIT(21) | BIT(22));

	/* enable instruction tracing for corresponding exception level */

	val &= drvdata->ns_ex_level;

	drvdata->vinst_ctrl |= (val << 20);

	spin_unlock(&drvdata->spinlock);

	return size;

}

static DEVICE_ATTR_RW(ns_exlevel_vinst);



static ssize_t cpu_show(struct device *dev,

			struct device_attribute *attr, char *buf)

{
@@ -963,6 +1058,9 @@ static struct attribute *coresight_etmv4_attrs[] = { 
	&dev_attr_syncfreq.attr,

	&dev_attr_cyc_threshold.attr,

	&dev_attr_bb_ctrl.attr,

	&dev_attr_event_vinst.attr,

	&dev_attr_s_exlevel_vinst.attr,

	&dev_attr_ns_exlevel_vinst.attr,

	&dev_attr_cpu.attr,

	NULL,

};