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Commit a39af6f7 authored by Jonas Bonn's avatar Jonas Bonn
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OpenRISC: DMA 



Simple DMA implementation.  Allows for allocation of coherent memory
(simply uncached) for DMA operations.

Signed-off-by: default avatarJonas Bonn <jonas@southpole.se>
Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
parent e5ad95ce

arch/openrisc/include/asm/dma-mapping.h

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/*

 * OpenRISC Linux

 *

 * Linux architectural port borrowing liberally from similar works of

 * others.  All original copyrights apply as per the original source

 * declaration.

 *

 * OpenRISC implementation:

 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 */



#ifndef __ASM_OPENRISC_DMA_MAPPING_H

#define __ASM_OPENRISC_DMA_MAPPING_H



/*

 * See Documentation/PCI/PCI-DMA-mapping.txt and

 * Documentation/DMA-API.txt for documentation.

 *

 * This file is written with the intention of eventually moving over

 * to largely using asm-generic/dma-mapping-common.h in its place.

 */



#include <linux/dma-debug.h>

#include <asm-generic/dma-coherent.h>

#include <linux/kmemcheck.h>



#define DMA_ERROR_CODE		(~(dma_addr_t)0x0)



int dma_mapping_error(struct device *dev, dma_addr_t dma_addr);



#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)

#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)



void *or1k_dma_alloc_coherent(struct device *dev, size_t size,

			      dma_addr_t *dma_handle, gfp_t flag);

void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,

			    dma_addr_t dma_handle);

dma_addr_t or1k_map_page(struct device *dev, struct page *page,

			 unsigned long offset, size_t size,

			 enum dma_data_direction dir,

			 struct dma_attrs *attrs);

void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,

		     size_t size, enum dma_data_direction dir,

		     struct dma_attrs *attrs);

void or1k_sync_single_for_cpu(struct device *dev,

			      dma_addr_t dma_handle, size_t size,

			      enum dma_data_direction dir);

void or1k_sync_single_for_device(struct device *dev,

			         dma_addr_t dma_handle, size_t size,

			         enum dma_data_direction dir);



static inline void *dma_alloc_coherent(struct device *dev, size_t size,

					dma_addr_t *dma_handle, gfp_t flag)

{

	void *memory;



	memory = or1k_dma_alloc_coherent(dev, size, dma_handle, flag);



	debug_dma_alloc_coherent(dev, size, *dma_handle, memory);

	return memory;

}



static inline void dma_free_coherent(struct device *dev, size_t size,

				     void *cpu_addr, dma_addr_t dma_handle)

{

	debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);

	or1k_dma_free_coherent(dev, size, cpu_addr, dma_handle);

}



static inline dma_addr_t dma_map_single(struct device *dev, void *ptr,

					size_t size,

					enum dma_data_direction dir)

{

	dma_addr_t addr;



	kmemcheck_mark_initialized(ptr, size);

	BUG_ON(!valid_dma_direction(dir));

	addr = or1k_map_page(dev, virt_to_page(ptr),

			     (unsigned long)ptr & ~PAGE_MASK, size,

			     dir, NULL);

	debug_dma_map_page(dev, virt_to_page(ptr),

			   (unsigned long)ptr & ~PAGE_MASK, size,

			   dir, addr, true);

	return addr;

}



static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,

					  size_t size,

					  enum dma_data_direction dir)

{

	BUG_ON(!valid_dma_direction(dir));

	or1k_unmap_page(dev, addr, size, dir, NULL);

	debug_dma_unmap_page(dev, addr, size, dir, true);

}



static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,

					   size_t size,

					   enum dma_data_direction dir)

{

	BUG_ON(!valid_dma_direction(dir));

	or1k_sync_single_for_cpu(dev, addr, size, dir);

	debug_dma_sync_single_for_cpu(dev, addr, size, dir);

}



static inline void dma_sync_single_for_device(struct device *dev,

					      dma_addr_t addr, size_t size,

					      enum dma_data_direction dir)

{

	BUG_ON(!valid_dma_direction(dir));

	or1k_sync_single_for_device(dev, addr, size, dir);

	debug_dma_sync_single_for_device(dev, addr, size, dir);

}



static inline int dma_supported(struct device *dev, u64 dma_mask)

{

	/* Support 32 bit DMA mask exclusively */

	return dma_mask == 0xffffffffULL;

}



static inline int dma_set_mask(struct device *dev, u64 dma_mask)

{

	if (!dev->dma_mask || !dma_supported(dev, dma_mask))

		return -EIO;



	*dev->dma_mask = dma_mask;



	return 0;

}

#endif	/* __ASM_OPENRISC_DMA_MAPPING_H */

arch/openrisc/kernel/dma.c

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/*

 * OpenRISC Linux

 *

 * Linux architectural port borrowing liberally from similar works of

 * others.  All original copyrights apply as per the original source

 * declaration.

 *

 * Modifications for the OpenRISC architecture:

 * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>

 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>

 *

 *      This program is free software; you can redistribute it and/or

 *      modify it under the terms of the GNU General Public License

 *      as published by the Free Software Foundation; either version

 *      2 of the License, or (at your option) any later version.

 *

 * DMA mapping callbacks...

 * As alloc_coherent is the only DMA callback being used currently, that's

 * the only thing implemented properly.  The rest need looking into...

 */



#include <linux/dma-mapping.h>

#include <linux/dma-debug.h>



#include <asm/cpuinfo.h>

#include <asm/spr_defs.h>

#include <asm/tlbflush.h>



static int page_set_nocache(pte_t *pte, unsigned long addr,

			    unsigned long next, struct mm_walk *walk)

{

	unsigned long cl;



	pte_val(*pte) |= _PAGE_CI;



	/*

	 * Flush the page out of the TLB so that the new page flags get

	 * picked up next time there's an access

	 */

	flush_tlb_page(NULL, addr);



	/* Flush page out of dcache */

	for (cl = __pa(addr); cl < __pa(next); cl += cpuinfo.dcache_block_size)

		mtspr(SPR_DCBFR, cl);



	return 0;

}



static int page_clear_nocache(pte_t *pte, unsigned long addr,

			      unsigned long next, struct mm_walk *walk)

{

	pte_val(*pte) &= ~_PAGE_CI;



	/*

	 * Flush the page out of the TLB so that the new page flags get

	 * picked up next time there's an access

	 */

	flush_tlb_page(NULL, addr);



	return 0;

}



/*

 * Alloc "coherent" memory, which for OpenRISC means simply uncached.

 *

 * This function effectively just calls __get_free_pages, sets the

 * cache-inhibit bit on those pages, and makes sure that the pages are

 * flushed out of the cache before they are used.

 *

 */

void *or1k_dma_alloc_coherent(struct device *dev, size_t size,

			      dma_addr_t *dma_handle, gfp_t gfp)

{

	unsigned long va;

	void *page;

	struct mm_walk walk = {

		.pte_entry = page_set_nocache,

		.mm = &init_mm

	};



	page = alloc_pages_exact(size, gfp);

	if (!page)

		return NULL;



	/* This gives us the real physical address of the first page. */

	*dma_handle = __pa(page);



	va = (unsigned long)page;



	/*

	 * We need to iterate through the pages, clearing the dcache for

	 * them and setting the cache-inhibit bit.

	 */

	if (walk_page_range(va, va + size, &walk)) {

		free_pages_exact(page, size);

		return NULL;

	}



	return (void *)va;

}



void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,

			    dma_addr_t dma_handle)

{

	unsigned long va = (unsigned long)vaddr;

	struct mm_walk walk = {

		.pte_entry = page_clear_nocache,

		.mm = &init_mm

	};



	/* walk_page_range shouldn't be able to fail here */

	WARN_ON(walk_page_range(va, va + size, &walk));



	free_pages_exact(vaddr, size);

}



dma_addr_t or1k_map_page(struct device *dev, struct page *page,

			 unsigned long offset, size_t size,

			 enum dma_data_direction dir,

			 struct dma_attrs *attrs)

{

	unsigned long cl;

	dma_addr_t addr = page_to_phys(page) + offset;



	switch (dir) {

	case DMA_TO_DEVICE:

		/* Flush the dcache for the requested range */

		for (cl = addr; cl < addr + size;

		     cl += cpuinfo.dcache_block_size)

			mtspr(SPR_DCBFR, cl);

		break;

	case DMA_FROM_DEVICE:

		/* Invalidate the dcache for the requested range */

		for (cl = addr; cl < addr + size;

		     cl += cpuinfo.dcache_block_size)

			mtspr(SPR_DCBIR, cl);

		break;

	default:

		/*

		 * NOTE: If dir == DMA_BIDIRECTIONAL then there's no need to

		 * flush nor invalidate the cache here as the area will need

		 * to be manually synced anyway.

		 */

		break;

	}



	return addr;

}



void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,

		     size_t size, enum dma_data_direction dir,

		     struct dma_attrs *attrs)

{

	/* Nothing special to do here... */

}



void or1k_sync_single_for_cpu(struct device *dev,

			      dma_addr_t dma_handle, size_t size,

			      enum dma_data_direction dir)

{

	unsigned long cl;

	dma_addr_t addr = dma_handle;



	/* Invalidate the dcache for the requested range */

	for (cl = addr; cl < addr + size; cl += cpuinfo.dcache_block_size)

		mtspr(SPR_DCBIR, cl);

}



void or1k_sync_single_for_device(struct device *dev,

			         dma_addr_t dma_handle, size_t size,

			         enum dma_data_direction dir)

{

	unsigned long cl;

	dma_addr_t addr = dma_handle;



	/* Flush the dcache for the requested range */

	for (cl = addr; cl < addr + size; cl += cpuinfo.dcache_block_size)

		mtspr(SPR_DCBFR, cl);

}



/* Number of entries preallocated for DMA-API debugging */

#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)



static int __init dma_init(void)

{

	dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);



	return 0;

}



fs_initcall(dma_init);