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Commit a3934c0b authored by Sudheer Papothi's avatar Sudheer Papothi
Browse files

ASoC: wcd9335: Add 8KHz sample rate support on VI feedback path 



Speaker protection algorithm uses VI feedback path samples for
gain calculation. VI feedback path on WCD9335 operates at 8KHz
sample rate. Add support for 8KHz sample rate on VI feedback
patch on WCD9335 codec.

Change-Id: Ie89748f7d5eb84b3e20802ace5649052d4553319
Signed-off-by: default avatarSudheer Papothi <spapothi@codeaurora.org>
parent 861a4ae9

sound/soc/codecs/wcd9335.c

+28 −25
Original line number Diff line number Diff line
@@ -55,7 +55,11 @@ 
				SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)



#define TASHA_FORMATS_S16_S24_LE (SNDRV_PCM_FMTBIT_S16_LE | \

				  SNDRV_PCM_FORMAT_S24_LE)

				  SNDRV_PCM_FMTBIT_S24_LE)



#define TASHA_FORMATS_S16_S24_S32_LE (SNDRV_PCM_FMTBIT_S16_LE | \

				  SNDRV_PCM_FMTBIT_S24_LE | \

				  SNDRV_PCM_FMTBIT_S32_LE)



#define TASHA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
@@ -1527,33 +1531,30 @@ static int tasha_codec_enable_slimvi_feedback(struct snd_soc_dapm_widget *w, 
			dev_dbg(codec->dev, "%s: spkr1 enabled\n", __func__);

			/* Enable V&I sensing */

			snd_soc_update_bits(codec,

					WCD9335_CDC_TX9_SPKR_PROT_PATH_CTL,

					0x20, 0x20);

			snd_soc_update_bits(codec,

					WCD9335_CDC_TX9_SPKR_PROT_PATH_CTL,

					0x20, 0x00);

				WCD9335_CDC_TX9_SPKR_PROT_PATH_CTL, 0x0F, 0x00);

			snd_soc_update_bits(codec,

					WCD9335_CDC_TX9_SPKR_PROT_PATH_CFG0,

					0x02, 0x02);

			/* Enable spkr VI clocks */

				WCD9335_CDC_TX10_SPKR_PROT_PATH_CTL, 0x0F,

				0x00);

			snd_soc_update_bits(codec,

				WCD9335_CDC_TX9_SPKR_PROT_PATH_CTL, 0x10, 0x10);

			snd_soc_update_bits(codec,

				WCD9335_CDC_TX10_SPKR_PROT_PATH_CTL, 0x10,

				0x10);

		}

		if (test_bit(VI_SENSE_2, &tasha_p->status_mask)) {

			pr_debug("%s: spkr2 enabled\n", __func__);

			/* Enable V&I sensing */

			snd_soc_update_bits(codec,

					WCD9335_CDC_TX10_SPKR_PROT_PATH_CTL,

					0x20, 0x20);

				WCD9335_CDC_TX11_SPKR_PROT_PATH_CTL, 0x0F,

				0x00);

			snd_soc_update_bits(codec,

					WCD9335_CDC_TX10_SPKR_PROT_PATH_CTL,

					0x20, 0x00);

				WCD9335_CDC_TX12_SPKR_PROT_PATH_CTL, 0x0F,

				0x00);

			snd_soc_update_bits(codec,

					WCD9335_CDC_TX10_SPKR_PROT_PATH_CFG0,

					0x02, 0x02);

			/* Enable spkr VI clocks */

				WCD9335_CDC_TX11_SPKR_PROT_PATH_CTL, 0x10,

				0x10);

			snd_soc_update_bits(codec,

				WCD9335_CDC_TX10_SPKR_PROT_PATH_CTL, 0x10,

				WCD9335_CDC_TX12_SPKR_PROT_PATH_CTL, 0x10,

				0x10);

		}

		tasha_codec_enable_int_port(dai, codec);
@@ -1582,18 +1583,18 @@ static int tasha_codec_enable_slimvi_feedback(struct snd_soc_dapm_widget *w, 
			snd_soc_update_bits(codec,

				WCD9335_CDC_TX9_SPKR_PROT_PATH_CTL, 0x10, 0x00);

			snd_soc_update_bits(codec,

					WCD9335_CDC_TX9_SPKR_PROT_PATH_CFG0,

					0x02, 0x00);

				WCD9335_CDC_TX10_SPKR_PROT_PATH_CTL, 0x10,

				0x00);

		}

		if (test_bit(VI_SENSE_2, &tasha_p->status_mask)) {

			/* Disable V&I sensing */

			dev_dbg(codec->dev, "%s: spkr2 disabled\n", __func__);

			snd_soc_update_bits(codec,

				WCD9335_CDC_TX10_SPKR_PROT_PATH_CTL, 0x10,

				WCD9335_CDC_TX11_SPKR_PROT_PATH_CTL, 0x10,

				0x00);

			snd_soc_update_bits(codec,

					WCD9335_CDC_TX10_SPKR_PROT_PATH_CFG0,

					0x02, 0x00);

				WCD9335_CDC_TX12_SPKR_PROT_PATH_CTL, 0x10,

				0x00);

		}

		break;

	}
@@ -6775,6 +6776,8 @@ static int tasha_hw_params(struct snd_pcm_substream *substream, 
			substream->stream);

		return -EINVAL;

	};

	if (dai->id == AIF4_VIFEED)

		tasha->dai[dai->id].bit_width = 32;



	return 0;

}
@@ -6919,10 +6922,10 @@ static struct snd_soc_dai_driver tasha_dai[] = { 
		.id = AIF4_VIFEED,

		.capture = {

			.stream_name = "VIfeed",

			.rates = SNDRV_PCM_RATE_48000,

			.formats = TASHA_FORMATS,

			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_48000,

			.formats = TASHA_FORMATS_S16_S24_S32_LE,

			.rate_max = 48000,

			.rate_min = 48000,

			.rate_min = 8000,

			.channels_min = 1,

			.channels_max = 2,

		 },