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Commit a3019eda authored by Divya Ponnusamy's avatar Divya Ponnusamy Committed by Gerrit - the friendly Code Review server
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msm: kgsl: Add pm_qos_cpu_mask_latency to avoid L2PC on mask CPU 



Add a l2pc-cpu-mask-latency in device tree. This latency
is used in kgsl_pwrctrl_update_l2pc() API to avoid L2PC
on masked CPUs by giving reduced latency value.

Change-Id: I0447977bce5ed5c09a863b03bb42b9428686a9f5
Signed-off-by: default avatarDivya Ponnusamy <pdivya@codeaurora.org>
parent 2f2a03e6

Documentation/devicetree/bindings/gpu/adreno.txt

+3 −0
Original line number Diff line number Diff line
@@ -107,6 +107,9 @@ Optional Properties: 
- qcom,pm-qos-wakeup-latency:

				Similar to the above. Driver votes against deep low

				power modes right before GPU wakes up from sleep.

- qcom,l2pc-cpu-mask-latency:

				The CPU mask latency in microseconds to avoid L2PC

				on masked CPUs.

- qcom,force-32bit:

				Force the GPU to use 32 bit data sizes even if

				it is capable of doing 64 bit.

drivers/gpu/msm/adreno.c

+5 −0
Original line number Diff line number Diff line
@@ -832,6 +832,11 @@ static int adreno_of_get_power(struct adreno_device *adreno_dev, 
		&device->pwrctrl.pm_qos_active_latency))

		device->pwrctrl.pm_qos_active_latency = 501;



	/* get pm-qos-cpu-mask-latency, set it to default if not found */

	if (of_property_read_u32(node, "qcom,l2pc-cpu-mask-latency",

		&device->pwrctrl.pm_qos_cpu_mask_latency))

		device->pwrctrl.pm_qos_cpu_mask_latency = 501;



	/* get pm-qos-wakeup-latency, set it to default if not found */

	if (of_property_read_u32(node, "qcom,pm-qos-wakeup-latency",

		&device->pwrctrl.pm_qos_wakeup_latency))

drivers/gpu/msm/kgsl_pwrctrl.c

+1 −9
Original line number Diff line number Diff line
@@ -485,7 +485,7 @@ void kgsl_pwrctrl_update_l2pc(struct kgsl_device *device) 
	if ((1 << cpu) & device->pwrctrl.l2pc_cpus_mask) {

		pm_qos_update_request_timeout(

				&device->pwrctrl.l2pc_cpus_qos,

				device->pwrctrl.pm_qos_active_latency,

				device->pwrctrl.pm_qos_cpu_mask_latency,

				KGSL_L2PC_CPU_TIMEOUT);

	}

}
@@ -1745,14 +1745,6 @@ int kgsl_pwrctrl_init(struct kgsl_device *device) 


	pwr->power_flags = 0;



	if (kgsl_property_read_u32(device, "qcom,pm-qos-active-latency",

		&pwr->pm_qos_active_latency))

		pwr->pm_qos_active_latency = 501;



	if (kgsl_property_read_u32(device, "qcom,pm-qos-wakeup-latency",

		&pwr->pm_qos_wakeup_latency))

		pwr->pm_qos_wakeup_latency = 101;



	kgsl_property_read_u32(device, "qcom,l2pc-cpu-mask",

			&pwr->l2pc_cpus_mask);

drivers/gpu/msm/kgsl_pwrctrl.h

+2 −0
Original line number Diff line number Diff line
@@ -132,6 +132,7 @@ struct kgsl_regulator { 
 * @l2pc_cpus_qos - qos structure to avoid L2PC on CPUs

 * @pm_qos_req_dma - the power management quality of service structure

 * @pm_qos_active_latency - allowed CPU latency in microseconds when active

 * @pm_qos_cpu_mask_latency - allowed CPU mask latency in microseconds

 * @pm_qos_wakeup_latency - allowed CPU latency in microseconds during wakeup

 * @bus_control - true if the bus calculation is independent

 * @bus_mod - modifier from the current power level for the bus vote
@@ -183,6 +184,7 @@ struct kgsl_pwrctrl { 
	struct pm_qos_request l2pc_cpus_qos;

	struct pm_qos_request pm_qos_req_dma;

	unsigned int pm_qos_active_latency;

	unsigned int pm_qos_cpu_mask_latency;

	unsigned int pm_qos_wakeup_latency;

	bool bus_control;

	int bus_mod;