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Commit a2d07b74 authored by Jerome Glisse's avatar Jerome Glisse Committed by Dave Airlie
Browse files

drm/radeon/kms: rename gpu_reset to asic_reset 



Patch rename gpu_reset to asic_reset in prevision of having
gpu_reset doing more stuff than just basic asic reset.

Signed-off-by: default avatarJerome Glisse <jglisse@redhat.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 225758d8

drivers/gpu/drm/radeon/evergreen.c

+1 −1
Original line number Diff line number Diff line
@@ -492,7 +492,7 @@ bool evergreen_gpu_is_lockup(struct radeon_device *rdev) 
	return false;

}



int evergreen_gpu_reset(struct radeon_device *rdev)

int evergreen_asic_reset(struct radeon_device *rdev)

{

	/* FIXME: implement for evergreen */

	return 0;

drivers/gpu/drm/radeon/r100.c

+3 −3
Original line number Diff line number Diff line
@@ -1863,7 +1863,7 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev) 
	return r100_gpu_cp_is_lockup(rdev, &rdev->config.r100.lockup, &rdev->cp);

}



int r100_gpu_reset(struct radeon_device *rdev)

int r100_asic_reset(struct radeon_device *rdev)

{

	uint32_t status;
@@ -3512,7 +3512,7 @@ int r100_resume(struct radeon_device *rdev) 
	/* Resume clock before doing reset */

	r100_clock_startup(rdev);

	/* Reset gpu before posting otherwise ATOM will enter infinite loop */

	if (radeon_gpu_reset(rdev)) {

	if (radeon_asic_reset(rdev)) {

		dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",

			RREG32(R_000E40_RBBM_STATUS),

			RREG32(R_0007C0_CP_STAT));
@@ -3581,7 +3581,7 @@ int r100_init(struct radeon_device *rdev) 
			return r;

	}

	/* Reset gpu before posting otherwise ATOM will enter infinite loop */

	if (radeon_gpu_reset(rdev)) {

	if (radeon_asic_reset(rdev)) {

		dev_warn(rdev->dev,

			"GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",

			RREG32(R_000E40_RBBM_STATUS),

drivers/gpu/drm/radeon/r300.c

+3 −3
Original line number Diff line number Diff line
@@ -449,7 +449,7 @@ bool r300_gpu_is_lockup(struct radeon_device *rdev) 
	return r100_gpu_cp_is_lockup(rdev, &rdev->config.r300.lockup, &rdev->cp);

}



int r300_gpu_reset(struct radeon_device *rdev)

int r300_asic_reset(struct radeon_device *rdev)

{

	uint32_t status;
@@ -1333,7 +1333,7 @@ int r300_resume(struct radeon_device *rdev) 
	/* Resume clock before doing reset */

	r300_clock_startup(rdev);

	/* Reset gpu before posting otherwise ATOM will enter infinite loop */

	if (radeon_gpu_reset(rdev)) {

	if (radeon_asic_reset(rdev)) {

		dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",

			RREG32(R_000E40_RBBM_STATUS),

			RREG32(R_0007C0_CP_STAT));
@@ -1404,7 +1404,7 @@ int r300_init(struct radeon_device *rdev) 
			return r;

	}

	/* Reset gpu before posting otherwise ATOM will enter infinite loop */

	if (radeon_gpu_reset(rdev)) {

	if (radeon_asic_reset(rdev)) {

		dev_warn(rdev->dev,

			"GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",

			RREG32(R_000E40_RBBM_STATUS),

drivers/gpu/drm/radeon/r420.c

+2 −2
Original line number Diff line number Diff line
@@ -234,7 +234,7 @@ int r420_resume(struct radeon_device *rdev) 
	/* Resume clock before doing reset */

	r420_clock_resume(rdev);

	/* Reset gpu before posting otherwise ATOM will enter infinite loop */

	if (radeon_gpu_reset(rdev)) {

	if (radeon_asic_reset(rdev)) {

		dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",

			RREG32(R_000E40_RBBM_STATUS),

			RREG32(R_0007C0_CP_STAT));
@@ -315,7 +315,7 @@ int r420_init(struct radeon_device *rdev) 
		}

	}

	/* Reset gpu before posting otherwise ATOM will enter infinite loop */

	if (radeon_gpu_reset(rdev)) {

	if (radeon_asic_reset(rdev)) {

		dev_warn(rdev->dev,

			"GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",

			RREG32(R_000E40_RBBM_STATUS),

drivers/gpu/drm/radeon/r520.c

+2 −2
Original line number Diff line number Diff line
@@ -209,7 +209,7 @@ int r520_resume(struct radeon_device *rdev) 
	/* Resume clock before doing reset */

	rv515_clock_startup(rdev);

	/* Reset gpu before posting otherwise ATOM will enter infinite loop */

	if (radeon_gpu_reset(rdev)) {

	if (radeon_asic_reset(rdev)) {

		dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",

			RREG32(R_000E40_RBBM_STATUS),

			RREG32(R_0007C0_CP_STAT));
@@ -246,7 +246,7 @@ int r520_init(struct radeon_device *rdev) 
		return -EINVAL;

	}

	/* Reset gpu before posting otherwise ATOM will enter infinite loop */

	if (radeon_gpu_reset(rdev)) {

	if (radeon_asic_reset(rdev)) {

		dev_warn(rdev->dev,

			"GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",

			RREG32(R_000E40_RBBM_STATUS),