Loading arch/arm/boot/dts/qcom/mdmfermium-regulator.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -259,8 +259,8 @@ mdmfermium_l13: regulator-l13 { compatible = "qcom,rpm-smd-regulator"; regulator-name = "mdmfermium_l13"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2850000>; qcom,init-voltage = <2850000>; status = "okay"; }; Loading arch/arm/configs/mdmfermium-perf_defconfig +11 −1 Original line number Diff line number Diff line Loading @@ -192,7 +192,8 @@ CONFIG_MSM_RMNET_BAM=y # CONFIG_NET_VENDOR_STMICRO is not set CONFIG_PPP=y CONFIG_PPP_ASYNC=y CONFIG_CLD_LL_CORE=y CONFIG_CNSS_SDIO=y CONFIG_CLD_HL_SDIO_CORE=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD is not set Loading Loading @@ -269,6 +270,15 @@ CONFIG_USB_GADGET_DEBUG_FS=y CONFIG_USB_GADGET_VBUS_DRAW=500 CONFIG_USB_CI13XXX_MSM=y CONFIG_USB_G_ANDROID=y CONFIG_MMC=y CONFIG_MMC_PERF_PROFILING=y CONFIG_MMC_CLKGATE=y CONFIG_MMC_PARANOID_SD_INIT=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_TEST=m CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_MSM=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_QPNP=y CONFIG_DMADEVICES=y Loading arch/arm/configs/mdmfermium_defconfig +11 −1 Original line number Diff line number Diff line Loading @@ -192,7 +192,8 @@ CONFIG_MSM_RMNET_BAM=y # CONFIG_NET_VENDOR_STMICRO is not set CONFIG_PPP=y CONFIG_PPP_ASYNC=y CONFIG_CLD_LL_CORE=y CONFIG_CNSS_SDIO=y CONFIG_CLD_HL_SDIO_CORE=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD is not set Loading Loading @@ -271,6 +272,15 @@ CONFIG_USB_GADGET_DEBUG_FS=y CONFIG_USB_GADGET_VBUS_DRAW=500 CONFIG_USB_CI13XXX_MSM=y CONFIG_USB_G_ANDROID=y CONFIG_MMC=y CONFIG_MMC_PERF_PROFILING=y CONFIG_MMC_CLKGATE=y CONFIG_MMC_PARANOID_SD_INIT=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_TEST=m CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_MSM=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_QPNP=y CONFIG_DMADEVICES=y Loading drivers/mmc/host/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -369,6 +369,8 @@ config MMC_SDHCI_MSM tristate "Qualcomm SDHCI Controller Support" depends on ARCH_QCOM || ARCH_MSM || (ARM && COMPILE_TEST) depends on MMC_SDHCI_PLTFM select PM_DEVFREQ select DEVFREQ_GOV_SIMPLE_ONDEMAND help This selects the Secure Digital Host Controller Interface (SDHCI) support present in Qualcomm SOCs. The controller supports Loading drivers/mmc/host/sdhci-msm.c +24 −3 Original line number Diff line number Diff line Loading @@ -1432,6 +1432,15 @@ out: return ret; } #ifdef CONFIG_SMP static inline void parse_affine_irq(struct sdhci_msm_pltfm_data *pdata) { pdata->pm_qos_data.irq_req_type = PM_QOS_REQ_AFFINE_IRQ; } #else static inline void parse_affine_irq(struct sdhci_msm_pltfm_data *pdata) { } #endif static int sdhci_msm_pm_qos_parse_irq(struct device *dev, struct sdhci_msm_pltfm_data *pdata) { Loading @@ -1445,7 +1454,7 @@ static int sdhci_msm_pm_qos_parse_irq(struct device *dev, pdata->pm_qos_data.irq_req_type = PM_QOS_REQ_AFFINE_CORES; if (!of_property_read_string(np, "qcom,pm-qos-irq-type", &str) && !strcmp(str, "affine_irq")) { pdata->pm_qos_data.irq_req_type = PM_QOS_REQ_AFFINE_IRQ; parse_affine_irq(pdata); } /* must specify cpu for "affine_cores" type */ Loading Loading @@ -3299,6 +3308,17 @@ out: return count; } #ifdef CONFIG_SMP static inline void set_affine_irq(struct sdhci_msm_host *msm_host, struct sdhci_host *host) { msm_host->pm_qos_irq.req.irq = host->irq; } #else static inline void set_affine_irq(struct sdhci_msm_host *msm_host, struct sdhci_host *host) { } #endif void sdhci_msm_pm_qos_irq_init(struct sdhci_host *host) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); Loading @@ -3316,8 +3336,9 @@ void sdhci_msm_pm_qos_irq_init(struct sdhci_host *host) atomic_set(&msm_host->pm_qos_irq.counter, 0); msm_host->pm_qos_irq.req.type = msm_host->pdata->pm_qos_data.irq_req_type; if (msm_host->pm_qos_irq.req.type == PM_QOS_REQ_AFFINE_IRQ) msm_host->pm_qos_irq.req.irq = host->irq; if ((msm_host->pm_qos_irq.req.type != PM_QOS_REQ_AFFINE_CORES) && (msm_host->pm_qos_irq.req.type != PM_QOS_REQ_ALL_CORES)) set_affine_irq(msm_host, host); else cpumask_copy(&msm_host->pm_qos_irq.req.cpus_affine, cpumask_of(msm_host->pdata->pm_qos_data.irq_cpu)); Loading Loading
arch/arm/boot/dts/qcom/mdmfermium-regulator.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -259,8 +259,8 @@ mdmfermium_l13: regulator-l13 { compatible = "qcom,rpm-smd-regulator"; regulator-name = "mdmfermium_l13"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2850000>; qcom,init-voltage = <2850000>; status = "okay"; }; Loading
arch/arm/configs/mdmfermium-perf_defconfig +11 −1 Original line number Diff line number Diff line Loading @@ -192,7 +192,8 @@ CONFIG_MSM_RMNET_BAM=y # CONFIG_NET_VENDOR_STMICRO is not set CONFIG_PPP=y CONFIG_PPP_ASYNC=y CONFIG_CLD_LL_CORE=y CONFIG_CNSS_SDIO=y CONFIG_CLD_HL_SDIO_CORE=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD is not set Loading Loading @@ -269,6 +270,15 @@ CONFIG_USB_GADGET_DEBUG_FS=y CONFIG_USB_GADGET_VBUS_DRAW=500 CONFIG_USB_CI13XXX_MSM=y CONFIG_USB_G_ANDROID=y CONFIG_MMC=y CONFIG_MMC_PERF_PROFILING=y CONFIG_MMC_CLKGATE=y CONFIG_MMC_PARANOID_SD_INIT=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_TEST=m CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_MSM=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_QPNP=y CONFIG_DMADEVICES=y Loading
arch/arm/configs/mdmfermium_defconfig +11 −1 Original line number Diff line number Diff line Loading @@ -192,7 +192,8 @@ CONFIG_MSM_RMNET_BAM=y # CONFIG_NET_VENDOR_STMICRO is not set CONFIG_PPP=y CONFIG_PPP_ASYNC=y CONFIG_CLD_LL_CORE=y CONFIG_CNSS_SDIO=y CONFIG_CLD_HL_SDIO_CORE=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD is not set Loading Loading @@ -271,6 +272,15 @@ CONFIG_USB_GADGET_DEBUG_FS=y CONFIG_USB_GADGET_VBUS_DRAW=500 CONFIG_USB_CI13XXX_MSM=y CONFIG_USB_G_ANDROID=y CONFIG_MMC=y CONFIG_MMC_PERF_PROFILING=y CONFIG_MMC_CLKGATE=y CONFIG_MMC_PARANOID_SD_INIT=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_TEST=m CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_MSM=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_QPNP=y CONFIG_DMADEVICES=y Loading
drivers/mmc/host/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -369,6 +369,8 @@ config MMC_SDHCI_MSM tristate "Qualcomm SDHCI Controller Support" depends on ARCH_QCOM || ARCH_MSM || (ARM && COMPILE_TEST) depends on MMC_SDHCI_PLTFM select PM_DEVFREQ select DEVFREQ_GOV_SIMPLE_ONDEMAND help This selects the Secure Digital Host Controller Interface (SDHCI) support present in Qualcomm SOCs. The controller supports Loading
drivers/mmc/host/sdhci-msm.c +24 −3 Original line number Diff line number Diff line Loading @@ -1432,6 +1432,15 @@ out: return ret; } #ifdef CONFIG_SMP static inline void parse_affine_irq(struct sdhci_msm_pltfm_data *pdata) { pdata->pm_qos_data.irq_req_type = PM_QOS_REQ_AFFINE_IRQ; } #else static inline void parse_affine_irq(struct sdhci_msm_pltfm_data *pdata) { } #endif static int sdhci_msm_pm_qos_parse_irq(struct device *dev, struct sdhci_msm_pltfm_data *pdata) { Loading @@ -1445,7 +1454,7 @@ static int sdhci_msm_pm_qos_parse_irq(struct device *dev, pdata->pm_qos_data.irq_req_type = PM_QOS_REQ_AFFINE_CORES; if (!of_property_read_string(np, "qcom,pm-qos-irq-type", &str) && !strcmp(str, "affine_irq")) { pdata->pm_qos_data.irq_req_type = PM_QOS_REQ_AFFINE_IRQ; parse_affine_irq(pdata); } /* must specify cpu for "affine_cores" type */ Loading Loading @@ -3299,6 +3308,17 @@ out: return count; } #ifdef CONFIG_SMP static inline void set_affine_irq(struct sdhci_msm_host *msm_host, struct sdhci_host *host) { msm_host->pm_qos_irq.req.irq = host->irq; } #else static inline void set_affine_irq(struct sdhci_msm_host *msm_host, struct sdhci_host *host) { } #endif void sdhci_msm_pm_qos_irq_init(struct sdhci_host *host) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); Loading @@ -3316,8 +3336,9 @@ void sdhci_msm_pm_qos_irq_init(struct sdhci_host *host) atomic_set(&msm_host->pm_qos_irq.counter, 0); msm_host->pm_qos_irq.req.type = msm_host->pdata->pm_qos_data.irq_req_type; if (msm_host->pm_qos_irq.req.type == PM_QOS_REQ_AFFINE_IRQ) msm_host->pm_qos_irq.req.irq = host->irq; if ((msm_host->pm_qos_irq.req.type != PM_QOS_REQ_AFFINE_CORES) && (msm_host->pm_qos_irq.req.type != PM_QOS_REQ_ALL_CORES)) set_affine_irq(msm_host, host); else cpumask_copy(&msm_host->pm_qos_irq.req.cpus_affine, cpumask_of(msm_host->pdata->pm_qos_data.irq_cpu)); Loading