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Commit a1fff236 authored by Roland Stigge's avatar Roland Stigge Committed by Shawn Guo
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ARM: dts: imx53: pinctl update



This patch supplements pinctl support on i.MX53.

Signed-off-by: default avatarRoland Stigge <stigge@antcom.de>
Acked-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent d90df978
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+46 −0
Original line number Diff line number Diff line
@@ -320,6 +320,24 @@
					};
				};

				can1 {
					pinctrl_can1_1: can1grp-1 {
						fsl,pins = <
							847 0x80000000  /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */
							853 0x80000000  /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */
						>;
					};
				};

				can2 {
					pinctrl_can2_1: can2grp-1 {
						fsl,pins = <
							67  0x80000000  /* MX53_PAD_KEY_COL4__CAN2_TXCAN */
							74  0x80000000  /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */
						>;
					};
				};

				i2c1 {
					pinctrl_i2c1_1: i2c1grp-1 {
						fsl,pins = <
@@ -338,6 +356,15 @@
					};
				};

				i2c3 {
					pinctrl_i2c3_1: i2c3grp-1 {
						fsl,pins = <
							1102 0xc0000000	/* MX53_PAD_GPIO_6__I2C3_SDA */
							1130 0xc0000000	/* MX53_PAD_GPIO_5__I2C3_SCL */
						>;
					};
				};

				uart1 {
					pinctrl_uart1_1: uart1grp-1 {
						fsl,pins = <
@@ -373,6 +400,25 @@
						>;
					};
				};

				uart4 {
					pinctrl_uart4_1: uart4grp-1 {
						fsl,pins = <
							11 0x1c5	/* MX53_PAD_KEY_COL0__UART4_TXD_MUX */
							18 0x1c5	/* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */
						>;
					};
				};

				uart5 {
					pinctrl_uart5_1: uart5grp-1 {
						fsl,pins = <
							24 0x1c5	/* MX53_PAD_KEY_COL1__UART5_TXD_MUX */
							31 0x1c5	/* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */
						>;
					};
				};

			};

			uart1: serial@53fbc000 {