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Commit a1c0cad3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'fbdev-fixes-for-3.4-1' of git://github.com/schandinat/linux-2.6 

Pull fbdev fixes from Florian Tobias Schandinat:
 - a compile fix for au1*fb
 - a fix to make kyrofb usable on x86_64
 - a fix for uvesafb to prevent an oops due to NX-protection

 "The fix for kyrofb is a bit large but it's just replacing "unsigned
  long" by "u32" for 64 bit compatibility."

* tag 'fbdev-fixes-for-3.4-1' of git://github.com/schandinat/linux-2.6:
  video:uvesafb: Fix oops that uvesafb try to execute NX-protected page
  fbdev: fix au1*fb builds
  kyrofb: fix on x86_64
parents 659e45d8 b78f29ca

drivers/video/au1100fb.c

+3 −2
Original line number Diff line number Diff line
@@ -499,7 +499,8 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev) 
	au1100fb_fix.mmio_start = regs_res->start;

	au1100fb_fix.mmio_len = resource_size(regs_res);



	if (!devm_request_mem_region(au1100fb_fix.mmio_start,

	if (!devm_request_mem_region(&dev->dev,

				     au1100fb_fix.mmio_start,

				     au1100fb_fix.mmio_len,

				     DRIVER_NAME)) {

		print_err("fail to lock memory region at 0x%08lx",
@@ -516,7 +517,7 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev) 
	fbdev->fb_len = fbdev->panel->xres * fbdev->panel->yres *

		  	(fbdev->panel->bpp >> 3) * AU1100FB_NBR_VIDEO_BUFFERS;



	fbdev->fb_mem = dmam_alloc_coherent(&dev->dev, &dev->dev,

	fbdev->fb_mem = dmam_alloc_coherent(&dev->dev,

					    PAGE_ALIGN(fbdev->fb_len),

					    &fbdev->fb_phys, GFP_KERNEL);

	if (!fbdev->fb_mem) {

drivers/video/au1200fb.c

+1 −1
Original line number Diff line number Diff line
@@ -1724,7 +1724,7 @@ static int __devinit au1200fb_drv_probe(struct platform_device *dev) 
		/* Allocate the framebuffer to the maximum screen size */

		fbdev->fb_len = (win->w[plane].xres * win->w[plane].yres * bpp) / 8;



		fbdev->fb_mem = dmam_alloc_noncoherent(&dev->dev, &dev->dev,

		fbdev->fb_mem = dmam_alloc_noncoherent(&dev->dev,

				PAGE_ALIGN(fbdev->fb_len),

				&fbdev->fb_phys, GFP_KERNEL);

		if (!fbdev->fb_mem) {

drivers/video/kyro/STG4000Reg.h

+188 −188
Original line number Diff line number Diff line
@@ -73,210 +73,210 @@ typedef enum _OVRL_PIX_FORMAT { 
/* Register Table */

typedef struct {

	/* 0h  */

	volatile unsigned long Thread0Enable;	/* 0x0000 */

	volatile unsigned long Thread1Enable;	/* 0x0004 */

	volatile unsigned long Thread0Recover;	/* 0x0008 */

	volatile unsigned long Thread1Recover;	/* 0x000C */

	volatile unsigned long Thread0Step;	/* 0x0010 */

	volatile unsigned long Thread1Step;	/* 0x0014 */

	volatile unsigned long VideoInStatus;	/* 0x0018 */

	volatile unsigned long Core2InSignStart;	/* 0x001C */

	volatile unsigned long Core1ResetVector;	/* 0x0020 */

	volatile unsigned long Core1ROMOffset;	/* 0x0024 */

	volatile unsigned long Core1ArbiterPriority;	/* 0x0028 */

	volatile unsigned long VideoInControl;	/* 0x002C */

	volatile unsigned long VideoInReg0CtrlA;	/* 0x0030 */

	volatile unsigned long VideoInReg0CtrlB;	/* 0x0034 */

	volatile unsigned long VideoInReg1CtrlA;	/* 0x0038 */

	volatile unsigned long VideoInReg1CtrlB;	/* 0x003C */

	volatile unsigned long Thread0Kicker;	/* 0x0040 */

	volatile unsigned long Core2InputSign;	/* 0x0044 */

	volatile unsigned long Thread0ProgCtr;	/* 0x0048 */

	volatile unsigned long Thread1ProgCtr;	/* 0x004C */

	volatile unsigned long Thread1Kicker;	/* 0x0050 */

	volatile unsigned long GPRegister1;	/* 0x0054 */

	volatile unsigned long GPRegister2;	/* 0x0058 */

	volatile unsigned long GPRegister3;	/* 0x005C */

	volatile unsigned long GPRegister4;	/* 0x0060 */

	volatile unsigned long SerialIntA;	/* 0x0064 */



	volatile unsigned long Fill0[6];	/* GAP 0x0068 - 0x007C */



	volatile unsigned long SoftwareReset;	/* 0x0080 */

	volatile unsigned long SerialIntB;	/* 0x0084 */



	volatile unsigned long Fill1[37];	/* GAP 0x0088 - 0x011C */



	volatile unsigned long ROMELQV;	/* 0x011C */

	volatile unsigned long WLWH;	/* 0x0120 */

	volatile unsigned long ROMELWL;	/* 0x0124 */



	volatile unsigned long dwFill_1;	/* GAP 0x0128 */



	volatile unsigned long IntStatus;	/* 0x012C */

	volatile unsigned long IntMask;	/* 0x0130 */

	volatile unsigned long IntClear;	/* 0x0134 */



	volatile unsigned long Fill2[6];	/* GAP 0x0138 - 0x014C */



	volatile unsigned long ROMGPIOA;	/* 0x0150 */

	volatile unsigned long ROMGPIOB;	/* 0x0154 */

	volatile unsigned long ROMGPIOC;	/* 0x0158 */

	volatile unsigned long ROMGPIOD;	/* 0x015C */



	volatile unsigned long Fill3[2];	/* GAP 0x0160 - 0x0168 */



	volatile unsigned long AGPIntID;	/* 0x0168 */

	volatile unsigned long AGPIntClassCode;	/* 0x016C */

	volatile unsigned long AGPIntBIST;	/* 0x0170 */

	volatile unsigned long AGPIntSSID;	/* 0x0174 */

	volatile unsigned long AGPIntPMCSR;	/* 0x0178 */

	volatile unsigned long VGAFrameBufBase;	/* 0x017C */

	volatile unsigned long VGANotify;	/* 0x0180 */

	volatile unsigned long DACPLLMode;	/* 0x0184 */

	volatile unsigned long Core1VideoClockDiv;	/* 0x0188 */

	volatile unsigned long AGPIntStat;	/* 0x018C */

	volatile u32 Thread0Enable;	/* 0x0000 */

	volatile u32 Thread1Enable;	/* 0x0004 */

	volatile u32 Thread0Recover;	/* 0x0008 */

	volatile u32 Thread1Recover;	/* 0x000C */

	volatile u32 Thread0Step;	/* 0x0010 */

	volatile u32 Thread1Step;	/* 0x0014 */

	volatile u32 VideoInStatus;	/* 0x0018 */

	volatile u32 Core2InSignStart;	/* 0x001C */

	volatile u32 Core1ResetVector;	/* 0x0020 */

	volatile u32 Core1ROMOffset;	/* 0x0024 */

	volatile u32 Core1ArbiterPriority;	/* 0x0028 */

	volatile u32 VideoInControl;	/* 0x002C */

	volatile u32 VideoInReg0CtrlA;	/* 0x0030 */

	volatile u32 VideoInReg0CtrlB;	/* 0x0034 */

	volatile u32 VideoInReg1CtrlA;	/* 0x0038 */

	volatile u32 VideoInReg1CtrlB;	/* 0x003C */

	volatile u32 Thread0Kicker;	/* 0x0040 */

	volatile u32 Core2InputSign;	/* 0x0044 */

	volatile u32 Thread0ProgCtr;	/* 0x0048 */

	volatile u32 Thread1ProgCtr;	/* 0x004C */

	volatile u32 Thread1Kicker;	/* 0x0050 */

	volatile u32 GPRegister1;	/* 0x0054 */

	volatile u32 GPRegister2;	/* 0x0058 */

	volatile u32 GPRegister3;	/* 0x005C */

	volatile u32 GPRegister4;	/* 0x0060 */

	volatile u32 SerialIntA;	/* 0x0064 */



	volatile u32 Fill0[6];	/* GAP 0x0068 - 0x007C */



	volatile u32 SoftwareReset;	/* 0x0080 */

	volatile u32 SerialIntB;	/* 0x0084 */



	volatile u32 Fill1[37];	/* GAP 0x0088 - 0x011C */



	volatile u32 ROMELQV;	/* 0x011C */

	volatile u32 WLWH;	/* 0x0120 */

	volatile u32 ROMELWL;	/* 0x0124 */



	volatile u32 dwFill_1;	/* GAP 0x0128 */



	volatile u32 IntStatus;	/* 0x012C */

	volatile u32 IntMask;	/* 0x0130 */

	volatile u32 IntClear;	/* 0x0134 */



	volatile u32 Fill2[6];	/* GAP 0x0138 - 0x014C */



	volatile u32 ROMGPIOA;	/* 0x0150 */

	volatile u32 ROMGPIOB;	/* 0x0154 */

	volatile u32 ROMGPIOC;	/* 0x0158 */

	volatile u32 ROMGPIOD;	/* 0x015C */



	volatile u32 Fill3[2];	/* GAP 0x0160 - 0x0168 */



	volatile u32 AGPIntID;	/* 0x0168 */

	volatile u32 AGPIntClassCode;	/* 0x016C */

	volatile u32 AGPIntBIST;	/* 0x0170 */

	volatile u32 AGPIntSSID;	/* 0x0174 */

	volatile u32 AGPIntPMCSR;	/* 0x0178 */

	volatile u32 VGAFrameBufBase;	/* 0x017C */

	volatile u32 VGANotify;	/* 0x0180 */

	volatile u32 DACPLLMode;	/* 0x0184 */

	volatile u32 Core1VideoClockDiv;	/* 0x0188 */

	volatile u32 AGPIntStat;	/* 0x018C */



	/*

	   volatile unsigned long Fill4[0x0400/4 - 0x0190/4]; //GAP 0x0190 - 0x0400

	   volatile unsigned long Fill5[0x05FC/4 - 0x0400/4]; //GAP 0x0400 - 0x05FC Fog Table

	   volatile unsigned long Fill6[0x0604/4 - 0x0600/4]; //GAP 0x0600 - 0x0604

	   volatile unsigned long Fill7[0x0680/4 - 0x0608/4]; //GAP 0x0608 - 0x0680

	   volatile unsigned long Fill8[0x07FC/4 - 0x0684/4]; //GAP 0x0684 - 0x07FC

	   volatile u32 Fill4[0x0400/4 - 0x0190/4]; //GAP 0x0190 - 0x0400

	   volatile u32 Fill5[0x05FC/4 - 0x0400/4]; //GAP 0x0400 - 0x05FC Fog Table

	   volatile u32 Fill6[0x0604/4 - 0x0600/4]; //GAP 0x0600 - 0x0604

	   volatile u32 Fill7[0x0680/4 - 0x0608/4]; //GAP 0x0608 - 0x0680

	   volatile u32 Fill8[0x07FC/4 - 0x0684/4]; //GAP 0x0684 - 0x07FC

	 */

	volatile unsigned long Fill4[412];	/* 0x0190 - 0x07FC */



	volatile unsigned long TACtrlStreamBase;	/* 0x0800 */

	volatile unsigned long TAObjDataBase;	/* 0x0804 */

	volatile unsigned long TAPtrDataBase;	/* 0x0808 */

	volatile unsigned long TARegionDataBase;	/* 0x080C */

	volatile unsigned long TATailPtrBase;	/* 0x0810 */

	volatile unsigned long TAPtrRegionSize;	/* 0x0814 */

	volatile unsigned long TAConfiguration;	/* 0x0818 */

	volatile unsigned long TAObjDataStartAddr;	/* 0x081C */

	volatile unsigned long TAObjDataEndAddr;	/* 0x0820 */

	volatile unsigned long TAXScreenClip;	/* 0x0824 */

	volatile unsigned long TAYScreenClip;	/* 0x0828 */

	volatile unsigned long TARHWClamp;	/* 0x082C */

	volatile unsigned long TARHWCompare;	/* 0x0830 */

	volatile unsigned long TAStart;	/* 0x0834 */

	volatile unsigned long TAObjReStart;	/* 0x0838 */

	volatile unsigned long TAPtrReStart;	/* 0x083C */

	volatile unsigned long TAStatus1;	/* 0x0840 */

	volatile unsigned long TAStatus2;	/* 0x0844 */

	volatile unsigned long TAIntStatus;	/* 0x0848 */

	volatile unsigned long TAIntMask;	/* 0x084C */



	volatile unsigned long Fill5[235];	/* GAP 0x0850 - 0x0BF8 */



	volatile unsigned long TextureAddrThresh;	/* 0x0BFC */

	volatile unsigned long Core1Translation;	/* 0x0C00 */

	volatile unsigned long TextureAddrReMap;	/* 0x0C04 */

	volatile unsigned long RenderOutAGPRemap;	/* 0x0C08 */

	volatile unsigned long _3DRegionReadTrans;	/* 0x0C0C */

	volatile unsigned long _3DPtrReadTrans;	/* 0x0C10 */

	volatile unsigned long _3DParamReadTrans;	/* 0x0C14 */

	volatile unsigned long _3DRegionReadThresh;	/* 0x0C18 */

	volatile unsigned long _3DPtrReadThresh;	/* 0x0C1C */

	volatile unsigned long _3DParamReadThresh;	/* 0x0C20 */

	volatile unsigned long _3DRegionReadAGPRemap;	/* 0x0C24 */

	volatile unsigned long _3DPtrReadAGPRemap;	/* 0x0C28 */

	volatile unsigned long _3DParamReadAGPRemap;	/* 0x0C2C */

	volatile unsigned long ZBufferAGPRemap;	/* 0x0C30 */

	volatile unsigned long TAIndexAGPRemap;	/* 0x0C34 */

	volatile unsigned long TAVertexAGPRemap;	/* 0x0C38 */

	volatile unsigned long TAUVAddrTrans;	/* 0x0C3C */

	volatile unsigned long TATailPtrCacheTrans;	/* 0x0C40 */

	volatile unsigned long TAParamWriteTrans;	/* 0x0C44 */

	volatile unsigned long TAPtrWriteTrans;	/* 0x0C48 */

	volatile unsigned long TAParamWriteThresh;	/* 0x0C4C */

	volatile unsigned long TAPtrWriteThresh;	/* 0x0C50 */

	volatile unsigned long TATailPtrCacheAGPRe;	/* 0x0C54 */

	volatile unsigned long TAParamWriteAGPRe;	/* 0x0C58 */

	volatile unsigned long TAPtrWriteAGPRe;	/* 0x0C5C */

	volatile unsigned long SDRAMArbiterConf;	/* 0x0C60 */

	volatile unsigned long SDRAMConf0;	/* 0x0C64 */

	volatile unsigned long SDRAMConf1;	/* 0x0C68 */

	volatile unsigned long SDRAMConf2;	/* 0x0C6C */

	volatile unsigned long SDRAMRefresh;	/* 0x0C70 */

	volatile unsigned long SDRAMPowerStat;	/* 0x0C74 */



	volatile unsigned long Fill6[2];	/* GAP 0x0C78 - 0x0C7C */



	volatile unsigned long RAMBistData;	/* 0x0C80 */

	volatile unsigned long RAMBistCtrl;	/* 0x0C84 */

	volatile unsigned long FIFOBistKey;	/* 0x0C88 */

	volatile unsigned long RAMBistResult;	/* 0x0C8C */

	volatile unsigned long FIFOBistResult;	/* 0x0C90 */

	volatile u32 Fill4[412];	/* 0x0190 - 0x07FC */



	volatile u32 TACtrlStreamBase;	/* 0x0800 */

	volatile u32 TAObjDataBase;	/* 0x0804 */

	volatile u32 TAPtrDataBase;	/* 0x0808 */

	volatile u32 TARegionDataBase;	/* 0x080C */

	volatile u32 TATailPtrBase;	/* 0x0810 */

	volatile u32 TAPtrRegionSize;	/* 0x0814 */

	volatile u32 TAConfiguration;	/* 0x0818 */

	volatile u32 TAObjDataStartAddr;	/* 0x081C */

	volatile u32 TAObjDataEndAddr;	/* 0x0820 */

	volatile u32 TAXScreenClip;	/* 0x0824 */

	volatile u32 TAYScreenClip;	/* 0x0828 */

	volatile u32 TARHWClamp;	/* 0x082C */

	volatile u32 TARHWCompare;	/* 0x0830 */

	volatile u32 TAStart;	/* 0x0834 */

	volatile u32 TAObjReStart;	/* 0x0838 */

	volatile u32 TAPtrReStart;	/* 0x083C */

	volatile u32 TAStatus1;	/* 0x0840 */

	volatile u32 TAStatus2;	/* 0x0844 */

	volatile u32 TAIntStatus;	/* 0x0848 */

	volatile u32 TAIntMask;	/* 0x084C */



	volatile u32 Fill5[235];	/* GAP 0x0850 - 0x0BF8 */



	volatile u32 TextureAddrThresh;	/* 0x0BFC */

	volatile u32 Core1Translation;	/* 0x0C00 */

	volatile u32 TextureAddrReMap;	/* 0x0C04 */

	volatile u32 RenderOutAGPRemap;	/* 0x0C08 */

	volatile u32 _3DRegionReadTrans;	/* 0x0C0C */

	volatile u32 _3DPtrReadTrans;	/* 0x0C10 */

	volatile u32 _3DParamReadTrans;	/* 0x0C14 */

	volatile u32 _3DRegionReadThresh;	/* 0x0C18 */

	volatile u32 _3DPtrReadThresh;	/* 0x0C1C */

	volatile u32 _3DParamReadThresh;	/* 0x0C20 */

	volatile u32 _3DRegionReadAGPRemap;	/* 0x0C24 */

	volatile u32 _3DPtrReadAGPRemap;	/* 0x0C28 */

	volatile u32 _3DParamReadAGPRemap;	/* 0x0C2C */

	volatile u32 ZBufferAGPRemap;	/* 0x0C30 */

	volatile u32 TAIndexAGPRemap;	/* 0x0C34 */

	volatile u32 TAVertexAGPRemap;	/* 0x0C38 */

	volatile u32 TAUVAddrTrans;	/* 0x0C3C */

	volatile u32 TATailPtrCacheTrans;	/* 0x0C40 */

	volatile u32 TAParamWriteTrans;	/* 0x0C44 */

	volatile u32 TAPtrWriteTrans;	/* 0x0C48 */

	volatile u32 TAParamWriteThresh;	/* 0x0C4C */

	volatile u32 TAPtrWriteThresh;	/* 0x0C50 */

	volatile u32 TATailPtrCacheAGPRe;	/* 0x0C54 */

	volatile u32 TAParamWriteAGPRe;	/* 0x0C58 */

	volatile u32 TAPtrWriteAGPRe;	/* 0x0C5C */

	volatile u32 SDRAMArbiterConf;	/* 0x0C60 */

	volatile u32 SDRAMConf0;	/* 0x0C64 */

	volatile u32 SDRAMConf1;	/* 0x0C68 */

	volatile u32 SDRAMConf2;	/* 0x0C6C */

	volatile u32 SDRAMRefresh;	/* 0x0C70 */

	volatile u32 SDRAMPowerStat;	/* 0x0C74 */



	volatile u32 Fill6[2];	/* GAP 0x0C78 - 0x0C7C */



	volatile u32 RAMBistData;	/* 0x0C80 */

	volatile u32 RAMBistCtrl;	/* 0x0C84 */

	volatile u32 FIFOBistKey;	/* 0x0C88 */

	volatile u32 RAMBistResult;	/* 0x0C8C */

	volatile u32 FIFOBistResult;	/* 0x0C90 */



	/*

	   volatile unsigned long Fill11[0x0CBC/4 - 0x0C94/4]; //GAP 0x0C94 - 0x0CBC

	   volatile unsigned long Fill12[0x0CD0/4 - 0x0CC0/4]; //GAP 0x0CC0 - 0x0CD0 3DRegisters

	   volatile u32 Fill11[0x0CBC/4 - 0x0C94/4]; //GAP 0x0C94 - 0x0CBC

	   volatile u32 Fill12[0x0CD0/4 - 0x0CC0/4]; //GAP 0x0CC0 - 0x0CD0 3DRegisters

	 */



	volatile unsigned long Fill7[16];	/* 0x0c94 - 0x0cd0 */

	volatile u32 Fill7[16];	/* 0x0c94 - 0x0cd0 */



	volatile unsigned long SDRAMAddrSign;	/* 0x0CD4 */

	volatile unsigned long SDRAMDataSign;	/* 0x0CD8 */

	volatile unsigned long SDRAMSignConf;	/* 0x0CDC */

	volatile u32 SDRAMAddrSign;	/* 0x0CD4 */

	volatile u32 SDRAMDataSign;	/* 0x0CD8 */

	volatile u32 SDRAMSignConf;	/* 0x0CDC */



	/* DWFILL; //GAP 0x0CE0 */

	volatile unsigned long dwFill_2;



	volatile unsigned long ISPSignature;	/* 0x0CE4 */



	volatile unsigned long Fill8[454];	/*GAP 0x0CE8 - 0x13FC */



	volatile unsigned long DACPrimAddress;	/* 0x1400 */

	volatile unsigned long DACPrimSize;	/* 0x1404 */

	volatile unsigned long DACCursorAddr;	/* 0x1408 */

	volatile unsigned long DACCursorCtrl;	/* 0x140C */

	volatile unsigned long DACOverlayAddr;	/* 0x1410 */

	volatile unsigned long DACOverlayUAddr;	/* 0x1414 */

	volatile unsigned long DACOverlayVAddr;	/* 0x1418 */

	volatile unsigned long DACOverlaySize;	/* 0x141C */

	volatile unsigned long DACOverlayVtDec;	/* 0x1420 */



	volatile unsigned long Fill9[9];	/* GAP 0x1424 - 0x1444 */



	volatile unsigned long DACVerticalScal;	/* 0x1448 */

	volatile unsigned long DACPixelFormat;	/* 0x144C */

	volatile unsigned long DACHorizontalScal;	/* 0x1450 */

	volatile unsigned long DACVidWinStart;	/* 0x1454 */

	volatile unsigned long DACVidWinEnd;	/* 0x1458 */

	volatile unsigned long DACBlendCtrl;	/* 0x145C */

	volatile unsigned long DACHorTim1;	/* 0x1460 */

	volatile unsigned long DACHorTim2;	/* 0x1464 */

	volatile unsigned long DACHorTim3;	/* 0x1468 */

	volatile unsigned long DACVerTim1;	/* 0x146C */

	volatile unsigned long DACVerTim2;	/* 0x1470 */

	volatile unsigned long DACVerTim3;	/* 0x1474 */

	volatile unsigned long DACBorderColor;	/* 0x1478 */

	volatile unsigned long DACSyncCtrl;	/* 0x147C */

	volatile unsigned long DACStreamCtrl;	/* 0x1480 */

	volatile unsigned long DACLUTAddress;	/* 0x1484 */

	volatile unsigned long DACLUTData;	/* 0x1488 */

	volatile unsigned long DACBurstCtrl;	/* 0x148C */

	volatile unsigned long DACCrcTrigger;	/* 0x1490 */

	volatile unsigned long DACCrcDone;	/* 0x1494 */

	volatile unsigned long DACCrcResult1;	/* 0x1498 */

	volatile unsigned long DACCrcResult2;	/* 0x149C */

	volatile unsigned long DACLinecount;	/* 0x14A0 */



	volatile unsigned long Fill10[151];	/*GAP 0x14A4 - 0x16FC */



	volatile unsigned long DigVidPortCtrl;	/* 0x1700 */

	volatile unsigned long DigVidPortStat;	/* 0x1704 */

	volatile u32 dwFill_2;



	volatile u32 ISPSignature;	/* 0x0CE4 */



	volatile u32 Fill8[454];	/*GAP 0x0CE8 - 0x13FC */



	volatile u32 DACPrimAddress;	/* 0x1400 */

	volatile u32 DACPrimSize;	/* 0x1404 */

	volatile u32 DACCursorAddr;	/* 0x1408 */

	volatile u32 DACCursorCtrl;	/* 0x140C */

	volatile u32 DACOverlayAddr;	/* 0x1410 */

	volatile u32 DACOverlayUAddr;	/* 0x1414 */

	volatile u32 DACOverlayVAddr;	/* 0x1418 */

	volatile u32 DACOverlaySize;	/* 0x141C */

	volatile u32 DACOverlayVtDec;	/* 0x1420 */



	volatile u32 Fill9[9];	/* GAP 0x1424 - 0x1444 */



	volatile u32 DACVerticalScal;	/* 0x1448 */

	volatile u32 DACPixelFormat;	/* 0x144C */

	volatile u32 DACHorizontalScal;	/* 0x1450 */

	volatile u32 DACVidWinStart;	/* 0x1454 */

	volatile u32 DACVidWinEnd;	/* 0x1458 */

	volatile u32 DACBlendCtrl;	/* 0x145C */

	volatile u32 DACHorTim1;	/* 0x1460 */

	volatile u32 DACHorTim2;	/* 0x1464 */

	volatile u32 DACHorTim3;	/* 0x1468 */

	volatile u32 DACVerTim1;	/* 0x146C */

	volatile u32 DACVerTim2;	/* 0x1470 */

	volatile u32 DACVerTim3;	/* 0x1474 */

	volatile u32 DACBorderColor;	/* 0x1478 */

	volatile u32 DACSyncCtrl;	/* 0x147C */

	volatile u32 DACStreamCtrl;	/* 0x1480 */

	volatile u32 DACLUTAddress;	/* 0x1484 */

	volatile u32 DACLUTData;	/* 0x1488 */

	volatile u32 DACBurstCtrl;	/* 0x148C */

	volatile u32 DACCrcTrigger;	/* 0x1490 */

	volatile u32 DACCrcDone;	/* 0x1494 */

	volatile u32 DACCrcResult1;	/* 0x1498 */

	volatile u32 DACCrcResult2;	/* 0x149C */

	volatile u32 DACLinecount;	/* 0x14A0 */



	volatile u32 Fill10[151];	/*GAP 0x14A4 - 0x16FC */



	volatile u32 DigVidPortCtrl;	/* 0x1700 */

	volatile u32 DigVidPortStat;	/* 0x1704 */



	/*

	   volatile unsigned long Fill11[0x1FFC/4 - 0x1708/4]; //GAP 0x1708 - 0x1FFC

	   volatile unsigned long Fill17[0x3000/4 - 0x2FFC/4]; //GAP 0x2000 - 0x2FFC ALUT

	   volatile u32 Fill11[0x1FFC/4 - 0x1708/4]; //GAP 0x1708 - 0x1FFC

	   volatile u32 Fill17[0x3000/4 - 0x2FFC/4]; //GAP 0x2000 - 0x2FFC ALUT

	 */



	volatile unsigned long Fill11[1598];

	volatile u32 Fill11[1598];



	/* DWFILL; //GAP 0x3000          ALUT 256MB offset */

	volatile unsigned long Fill_3;

	volatile u32 Fill_3;



} STG4000REG;

drivers/video/uvesafb.c

+9 −2
Original line number Diff line number Diff line
@@ -815,8 +815,15 @@ static int __devinit uvesafb_vbe_init(struct fb_info *info) 
	par->pmi_setpal = pmi_setpal;

	par->ypan = ypan;



	if (par->pmi_setpal || par->ypan)

	if (par->pmi_setpal || par->ypan) {

		if (__supported_pte_mask & _PAGE_NX) {

			par->pmi_setpal = par->ypan = 0;

			printk(KERN_WARNING "uvesafb: NX protection is actively."

				"We have better not to use the PMI.\n");

		} else {

			uvesafb_vbe_getpmi(task, par);

		}

	}

#else

	/* The protected mode interface is not available on non-x86. */

	par->pmi_setpal = par->ypan = 0;