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Commit a148f116 authored by Taniya Das's avatar Taniya Das Committed by Gerrit - the friendly Code Review server
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clk: msm: clock-gcc: Add support to toggle MEM_CORE/PERIPH bits 



The mem_core and mem_periph bits are required to be toggle when the branch
clock is enabled and disabled thus helping in saving any power due to these
bits being left on.

Change-Id: I0bc4080c265ce2b4700c91d0e8e441dcf60ab903
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent c9c17af0

drivers/clk/msm/clock-gcc-mdm9607.c

+8 −0
Original line number Diff line number Diff line
@@ -1276,6 +1276,7 @@ static struct branch_clk gcc_sdcc1_apps_clk = { 
static struct branch_clk gcc_sdcc2_ahb_clk = {

	.cbcr_reg = SDCC2_AHB_CBCR,

	.has_sibling = 1,

	.toggle_memory = true,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_sdcc2_ahb_clk",
@@ -1287,6 +1288,7 @@ static struct branch_clk gcc_sdcc2_ahb_clk = { 
static struct branch_clk gcc_sdcc2_apps_clk = {

	.cbcr_reg = SDCC2_APPS_CBCR,

	.has_sibling = 0,

	.toggle_memory = true,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_sdcc2_apps_clk",
@@ -1299,6 +1301,7 @@ static struct branch_clk gcc_sdcc2_apps_clk = { 
static struct branch_clk gcc_emac_0_125m_clk = {

	.cbcr_reg = EMAC_0_125M_CBCR,

	.has_sibling = 0,

	.toggle_memory = true,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_emac_0_125m_clk",
@@ -1345,6 +1348,7 @@ static struct branch_clk gcc_emac_0_sys_25m_clk = { 
static struct branch_clk gcc_emac_0_sys_clk = {

	.cbcr_reg = EMAC_0_SYS_CBCR,

	.has_sibling = 1,

	.toggle_memory = true,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_emac_0_sys_clk",
@@ -1402,6 +1406,7 @@ static struct branch_clk gcc_usb_hs_phy_cfg_ahb_clk = { 
static struct branch_clk gcc_usb_hs_ahb_clk = {

	.cbcr_reg = USB_HS_AHB_CBCR,

	.has_sibling = 1,

	.toggle_memory = true,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_usb_hs_ahb_clk",
@@ -1414,6 +1419,7 @@ static struct branch_clk gcc_usb_hs_system_clk = { 
	.cbcr_reg = USB_HS_SYSTEM_CBCR,

	.bcr_reg = USB_HS_BCR,

	.has_sibling = 0,

	.toggle_memory = true,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_usb_hs_system_clk",
@@ -1426,6 +1432,7 @@ static struct branch_clk gcc_usb_hs_system_clk = { 
static struct branch_clk gcc_usb_hsic_ahb_clk = {

	.cbcr_reg = USB_HSIC_AHB_CBCR,

	.has_sibling = 1,

	.toggle_memory = true,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_usb_hsic_ahb_clk",
@@ -1472,6 +1479,7 @@ static struct branch_clk gcc_usb_hsic_io_cal_sleep_clk = { 
static struct branch_clk gcc_usb_hsic_system_clk = {

	.cbcr_reg = USB_HSIC_SYSTEM_CBCR,

	.bcr_reg  = USB_HS_HSIC_BCR,

	.toggle_memory = true,

	.has_sibling = 0,

	.base = &virt_bases[GCC_BASE],

	.c = {