Loading arch/arm/boot/dts/qcom/msm8952-coresight.dtsi +2 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,7 @@ qcom,memory-size = <0x100000>; qcom,sg-enable; qcom,force-reg-dump; coresight-id = <0>; coresight-name = "coresight-tmc-etr"; Loading Loading @@ -96,6 +97,7 @@ coresight-child-ports = <0>; coresight-default-sink; coresight-ctis = <&cti0 &cti8>; qcom,force-reg-dump; clocks = <&clock_gcc clk_qdss_clk>, <&clock_gcc clk_qdss_a_clk>; Loading Loading
arch/arm/boot/dts/qcom/msm8952-coresight.dtsi +2 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,7 @@ qcom,memory-size = <0x100000>; qcom,sg-enable; qcom,force-reg-dump; coresight-id = <0>; coresight-name = "coresight-tmc-etr"; Loading Loading @@ -96,6 +97,7 @@ coresight-child-ports = <0>; coresight-default-sink; coresight-ctis = <&cti0 &cti8>; qcom,force-reg-dump; clocks = <&clock_gcc clk_qdss_clk>, <&clock_gcc clk_qdss_a_clk>; Loading