Merge "ARM: dts: msm: disable the etm save-restore on msmtitanium" (a008ed96) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/boot/dts/qcom/msmtitanium.dtsi

+8 −0

Original line number	Diff line number	Diff line
		@@ -1215,6 +1215,7 @@
		<0x6190000 0x1000>;
		reg-names = "etm-base", "debug-base";

		qcom,save-restore-disable;
		qcom,coresight-jtagmm-cpu = <&CPU0>;

		clocks = <&clock_gcc clk_qdss_clk>,
		@@ -1228,6 +1229,7 @@
		<0x6192000 0x1000>;
		reg-names = "etm-base", "debug-base";

		qcom,save-restore-disable;
		qcom,coresight-jtagmm-cpu = <&CPU1>;

		clocks = <&clock_gcc clk_qdss_clk>,
		@@ -1241,6 +1243,7 @@
		<0x6194000 0x1000>;
		reg-names = "etm-base", "debug-base";

		qcom,save-restore-disable;
		qcom,coresight-jtagmm-cpu = <&CPU2>;

		clocks = <&clock_gcc clk_qdss_clk>,
		@@ -1254,6 +1257,7 @@
		<0x6196000 0x1000>;
		reg-names = "etm-base", "debug-base";

		qcom,save-restore-disable;
		qcom,coresight-jtagmm-cpu = <&CPU3>;

		clocks = <&clock_gcc clk_qdss_clk>,
		@@ -1267,6 +1271,7 @@
		<0x61b0000 0x1000>;
		reg-names = "etm-base", "debug-base";

		qcom,save-restore-disable;
		qcom,coresight-jtagmm-cpu = <&CPU4>;

		clocks = <&clock_gcc clk_qdss_clk>,
		@@ -1280,6 +1285,7 @@
		<0x61b2000 0x1000>;
		reg-names = "etm-base", "debug-base";

		qcom,save-restore-disable;
		qcom,coresight-jtagmm-cpu = <&CPU5>;

		clocks = <&clock_gcc clk_qdss_clk>,
		@@ -1293,6 +1299,7 @@
		<0x61b4000 0x1000>;
		reg-names = "etm-base", "debug-base";

		qcom,save-restore-disable;
		qcom,coresight-jtagmm-cpu = <&CPU6>;

		clocks = <&clock_gcc clk_qdss_clk>,
		@@ -1306,6 +1313,7 @@
		<0x61b6000 0x1000>;
		reg-names = "etm-base", "debug-base";

		qcom,save-restore-disable;
		qcom,coresight-jtagmm-cpu = <&CPU7>;

		clocks = <&clock_gcc clk_qdss_clk>,