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Commit 9faf1b00 authored by Alok Chauhan's avatar Alok Chauhan
Browse files

msm: emac: Fix pll lock issue on mdm9607 



Correct programming sequence to overcome from
PLL lock up for internal phy on mdm9607.

Change-Id: I8d6990230efc9b383aa8ac1b6d232d55a27f3a72
Signed-off-by: default avatarAlok Chauhan <alokc@codeaurora.org>
parent e51d54d3

Documentation/devicetree/bindings/net/msm-emac.txt

+3 −1
Original line number Diff line number Diff line
@@ -2,7 +2,9 @@ Qualcomm MSM Ethernet Controller (EMAC) 


Required properties:

- cell-index : EMAC controller instance number.

- compatible : Should be "qcom,emac".

- compatible : Should be "qcom,mdm9607-emac" for mdm9607 based EMAC driver

	       Should be "qcom,emac" for other targets based EMAC driver



- reg : Offset and length of the register regions for the device

- reg-names : Register region names referenced in 'reg' above.

	Required register resource entries are:

drivers/net/ethernet/qualcomm/emac/emac_defines.h

+8 −0
Original line number Diff line number Diff line
@@ -410,6 +410,9 @@ 
/* EMAC_QSERDES_COM_RESETSM_CNTRL */

#define FRQ_TUNE_MODE                                              0x10



/* EMAC_QSERDES_COM_BGTC */

#define BGTC							   0x7



/* EMAC_QSERDES_COM_PLLLOCK_CMP_EN */

#define PLLLOCK_CMP_EN                                             0x01
@@ -471,6 +474,11 @@ 
#define PLL_TXCLK_EN                                               0x02

#define PLL_RXCLK_EN                                               0x01



/* EMAC_QSERDES_COM_PLL_VCOTAIL_EN */

#define PLL_VCO_TAIL_MUX					   0x80

#define PLL_VCO_TAIL						   0x7c

#define PLL_EN_VCOTAIL_EN					   0x1



/* EMAC_SGMII_PHY_RX_PWR_CTRL */

#define L0_RX_SIGDET_EN                                            0x80

#define L0_RX_TERM_MODE_BMSK                                       0x30

drivers/net/ethernet/qualcomm/emac/emac_main.c

+15 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ char emac_drv_name[] = "qcom_emac"; 
const char emac_drv_description[] =

			     "Qualcomm Technologies, Inc. EMAC Ethernet Driver";

const char emac_drv_version[] = DRV_VERSION;

static struct of_device_id emac_dt_match[];



#define EMAC_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK |  \

		NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |         \
@@ -2740,6 +2741,7 @@ static int emac_get_resources(struct platform_device *pdev, 
	static const char * const res_name[] = {"emac", "emac_csr",

						"emac_1588"};

	const void *maddr;

	const struct of_device_id *id;



	if (!node)

		return -ENODEV;
@@ -2749,6 +2751,14 @@ static int emac_get_resources(struct platform_device *pdev, 
	if (retval)

		return retval;



	/* get board id */

	id = of_match_node(emac_dt_match, node);

	if (id == NULL) {

		emac_err(adpt, "can't find emac_dt_match node\n");

		return -ENODEV;

	}

	adpt->phy.board_id = (enum emac_phy_map_type)id->data;



	/* get time stamp enable flag */

	adpt->tstamp_en = of_property_read_bool(node, "qcom,emac-tstamp-en");
@@ -3303,6 +3313,11 @@ static const struct dev_pm_ops emac_pm_ops = { 
static struct of_device_id emac_dt_match[] = {

	{

		.compatible = "qcom,emac",

		.data = (void *)EMAC_PHY_MAP_DEFAULT,

	},

	{

		.compatible = "qcom,mdm9607-emac",

		.data = (void *)EMAC_PHY_MAP_MDM9607,

	},

	{}

};

drivers/net/ethernet/qualcomm/emac/emac_phy.c

+2 −5
Original line number Diff line number Diff line
@@ -566,11 +566,8 @@ int emac_phy_config_fc(struct emac_adapter *adpt) 
	return 0;

}



void emac_reg_write_all(void __iomem *base, const struct emac_reg_write *itr,

			size_t size)

void emac_reg_write_all(void __iomem *base, const struct emac_reg_write *itr)

{

	size_t i;



	for (i = 0; i < size; ++itr, ++i)

	for (; itr->offset != END_MARKER; ++itr)

		writel_relaxed(itr->val, base + itr->offset);

}

drivers/net/ethernet/qualcomm/emac/emac_phy.h

+8 −2
Original line number Diff line number Diff line
@@ -40,6 +40,12 @@ enum emac_flow_ctrl { 
	EMAC_FC_DEFAULT

};



enum emac_phy_map_type {

	EMAC_PHY_MAP_DEFAULT = 0,

	EMAC_PHY_MAP_MDM9607,

	EMAC_PHY_MAP_NUM,

};



/* emac_phy

 * @addr mii address

 * @id vendor id
@@ -67,6 +73,7 @@ struct emac_phy { 
	enum emac_flow_ctrl		cur_fc_mode;

	enum emac_flow_ctrl		req_fc_mode;

	bool				disable_fc_autoneg;

	enum emac_phy_map_type		board_id;

};



int emac_phy_config(struct platform_device *pdev, struct emac_adapter *adpt);
@@ -89,7 +96,6 @@ struct emac_reg_write { 
	u32		val;

};



void emac_reg_write_all(void __iomem *base, const struct emac_reg_write *itr,

			size_t size);

void emac_reg_write_all(void __iomem *base, const struct emac_reg_write *itr);



#endif /* __EMAC_PHY_H__ */