Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9fa944be authored by Mayank Rana's avatar Mayank Rana
Browse files

usb: qmp: phy: Turn ON PIPE3 clock branch before QMP PHY power up



SW_PWRDN_B (BIT:0) of USB3_PHY_POWER_DOWN_CONTROL register is active
low signal. Resetting QMP PHY keeps it into power down state only.
Hence enable PIPE3 clock branch before powering up QMP PHY.

Change-Id: I64d2b4482504f7a2f7c6e5ffd53a68ceca7543ba
Signed-off-by: default avatarMayank Rana <mrana@codeaurora.org>
parent 50e0173f
Loading
Loading
Loading
Loading
+3 −6
Original line number Diff line number Diff line
@@ -503,6 +503,9 @@ static int msm_ssphy_qmp_init(struct usb_phy *uphy)
			clk_prepare_enable(phy->ref_clk);
		clk_prepare_enable(phy->aux_clk);
		clk_prepare_enable(phy->cfg_ahb_clk);
		clk_set_rate(phy->pipe_clk, 125000000);
		clk_prepare_enable(phy->pipe_clk);
		phy->clk_enabled = true;
	}

	/* Rev ID is made up each of the LSBs of REVISION_ID[0-3] */
@@ -542,12 +545,6 @@ static int msm_ssphy_qmp_init(struct usb_phy *uphy)
	/* Make sure that above write completed to get PHY into POWER DOWN */
	mb();

	if (!phy->clk_enabled) {
		clk_set_rate(phy->pipe_clk, 125000000);
		clk_prepare_enable(phy->pipe_clk);
		phy->clk_enabled = true;
	}

	/* Main configuration */
	ret = configure_phy_regs(uphy, reg);
	if (ret) {