clk: msm: clock-cpu-8996: Reduce the alt PLL's early boot frequency



The alt PLL may be used even in the absence of CPR
safe mode or clock throttling. Comfigure it to a
safe frequency for the power and perf clusters at
bootup.

Change-Id: Ic9596b038b9ef8ac35379da52729c58f73884223
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>

parent aa3aa09a

drivers/clk/msm/clock-cpu-8996.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1275,7 +1275,7 @@ static int perfclspeedbin;
		unsigned long pwrcl_early_boot_rate = 883200000;
		unsigned long perfcl_early_boot_rate = 883200000;
		unsigned long cbf_early_boot_rate = 614400000;
		unsigned long alt_pll_early_boot_rate = 614400000;
		unsigned long alt_pll_early_boot_rate = 307200000;

		static int cpu_clock_8996_driver_probe(struct platform_device *pdev)
		{