Merge "ARM: dts: msm: add coresight support for msmtitanium" (9f774f40) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/boot/dts/qcom/msmtitanium-bus.dtsi

+22 −6

Original line number	Diff line number	Diff line
		/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -31,11 +31,17 @@
		qcom,fab-dev;
		qcom,base-name = "bimc-base";
		qcom,bus-type = <2>;
		qcom,bypass-qos-prg;
		qcom,util-fact = <154>;
		clock-names = "bus_clk", "bus_a_clk";
		clocks = <&clock_gcc clk_bimc_msmbus_clk>,
		<&clock_gcc clk_bimc_msmbus_a_clk>;

		coresight-id = <203>;
		coresight-name = "coresight-bimc";
		coresight-nr-inports = <0>;
		coresight-outports = <0>;
		coresight-child-list = <&funnel_in0>;
		coresight-child-ports = <2>;
		};

		fab_pcnoc: fab-pcnoc {
		@@ -43,13 +49,19 @@
		label = "fab-pcnoc";
		qcom,fab-dev;
		qcom,base-name = "pcnoc-base";
		qcom,bypass-qos-prg;
		qcom,base-offset = <0x7000>;
		qcom,qos-off = <0x1000>;
		qcom,bus-type = <1>;
		clock-names = "bus_clk", "bus_a_clk";
		clocks = <&clock_gcc clk_pcnoc_msmbus_clk>,
		<&clock_gcc clk_pcnoc_msmbus_a_clk>;

		coresight-id = <201>;
		coresight-name = "coresight-pcnoc";
		coresight-nr-inports = <0>;
		coresight-outports = <0>;
		coresight-child-list = <&funnel_center>;
		coresight-child-ports = <3>;
		};

		fab_snoc: fab-snoc {
		@@ -57,13 +69,19 @@
		label = "fab-snoc";
		qcom,fab-dev;
		qcom,base-name = "snoc-base";
		qcom,bypass-qos-prg;
		qcom,base-offset = <0x7000>;
		qcom,qos-off = <0x1000>;
		qcom,bus-type = <1>;
		clock-names = "bus_clk", "bus_a_clk";
		clocks = <&clock_gcc clk_snoc_msmbus_clk>,
		<&clock_gcc clk_snoc_msmbus_a_clk>;

		coresight-id = <200>;
		coresight-name = "coresight-snoc";
		coresight-nr-inports = <0>;
		coresight-outports = <0>;
		coresight-child-list = <&funnel_center>;
		coresight-child-ports = <4>;
		};

		fab_snoc_mm: fab-snoc-mm {
		@@ -71,7 +89,6 @@
		label = "fab-snoc-mm";
		qcom,fab-dev;
		qcom,base-name = "snoc-mm-base";
		qcom,bypass-qos-prg;
		qcom,base-offset = <0x7000>;
		qcom,qos-off = <0x1000>;
		qcom,bus-type = <1>;
		@@ -164,7 +181,6 @@
		qcom,connections = <&slv_ebi &slv_bimc_snoc>;
		qcom,prio-lvl = <2>;
		qcom,prio-rd = <2>;
		qcom,prio-wr = <2>;
		qcom,bus-dev = <&fab_bimc>;
		qcom,mas-rpm-id = <ICBID_MASTER_TCU_0>;
		};