power: qpnp-fg: fix error in configuring interrupt source for IMA

IACS_INTR_SRC_SLCT bit is under IMA_CFG (0x52) register whereas
the driver configures it in MEM_INTF_CFG (0x50) register. Fix it.

While at it, fix the typos in a comment section and a register
bit definition.

CRs-Fixed: 959007
Change-Id: I34d4763b5b9abd445b875ed94979f0634eba72cc
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>