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Commit 9f24b0c9 authored by Paul Mackerras's avatar Paul Mackerras Committed by Benjamin Herrenschmidt
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powerpc: Correct FSCR bit definitions 



Commit 74e400ce ("powerpc: Rework setting up H/FSCR bit definitions")
ended up with incorrect bit numbers for FSCR_PM_LG and FSCR_BHRB_LG.
This fixes them.

Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
Acked-by: default avatarMichael Neuling <mikey@neuling.org>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent fd3bb912

arch/powerpc/include/asm/reg.h

+2 −2
Original line number Diff line number Diff line
@@ -258,8 +258,8 @@ 
#define FSCR_TAR_LG	8	/* Enable Target Address Register */

#define FSCR_EBB_LG	7	/* Enable Event Based Branching */

#define FSCR_TM_LG	5	/* Enable Transactional Memory */

#define FSCR_PM_LG	4	/* Enable prob/priv access to PMU SPRs */

#define FSCR_BHRB_LG	3	/* Enable Branch History Rolling Buffer*/

#define FSCR_BHRB_LG	4	/* Enable Branch History Rolling Buffer*/

#define FSCR_PM_LG	3	/* Enable prob/priv access to PMU SPRs */

#define FSCR_DSCR_LG	2	/* Enable Data Stream Control Register */

#define FSCR_VECVSX_LG	1	/* Enable VMX/VSX  */

#define FSCR_FP_LG	0	/* Enable Floating Point */