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Commit 9e55e44e authored by Hidetoshi Seto's avatar Hidetoshi Seto Committed by H. Peter Anvin
Browse files

x86, mce: unify mce.h



There are 2 headers:
	arch/x86/include/asm/mce.h
	arch/x86/kernel/cpu/mcheck/mce.h
and in the latter small header:
	#include <asm/mce.h>

This patch move all contents in the latter header into the former,
and fix all files using the latter to include the former instead.

Signed-off-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent 9af43b54
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+34 −2
Original line number Diff line number Diff line
@@ -102,10 +102,42 @@ struct mce_log {

#ifdef __KERNEL__

#include <linux/percpu.h>
#include <linux/init.h>
#include <asm/atomic.h>

extern int mce_disabled;

#include <asm/atomic.h>
#include <linux/percpu.h>
#ifdef CONFIG_X86_OLD_MCE
void amd_mcheck_init(struct cpuinfo_x86 *c);
void intel_p4_mcheck_init(struct cpuinfo_x86 *c);
void intel_p6_mcheck_init(struct cpuinfo_x86 *c);
#endif

#ifdef CONFIG_X86_ANCIENT_MCE
void intel_p5_mcheck_init(struct cpuinfo_x86 *c);
void winchip_mcheck_init(struct cpuinfo_x86 *c);
extern int mce_p5_enable;
static inline int mce_p5_enabled(void) { return mce_p5_enable; }
static inline void enable_p5_mce(void) { mce_p5_enable = 1; }
#else
static inline void intel_p5_mcheck_init(struct cpuinfo_x86 *c) {}
static inline void winchip_mcheck_init(struct cpuinfo_x86 *c) {}
static inline int mce_p5_enabled(void) { return 0; }
static inline void enable_p5_mce(void) { }
#endif

/* Call the installed machine check handler for this CPU setup. */
extern void (*machine_check_vector)(struct pt_regs *, long error_code);

#ifdef CONFIG_X86_OLD_MCE
extern int nr_mce_banks;
extern void intel_set_thermal_handler(void);
#else
static inline void intel_set_thermal_handler(void) { }
#endif

void intel_init_thermal(struct cpuinfo_x86 *c);

void mce_setup(struct mce *m);
void mce_log(struct mce *m);
+1 −2
Original line number Diff line number Diff line
@@ -10,10 +10,9 @@

#include <asm/processor.h>
#include <asm/system.h>
#include <asm/mce.h>
#include <asm/msr.h>

#include "mce.h"

/* Machine Check Handler For AMD Athlon/Duron: */
static void k7_machine_check(struct pt_regs *regs, long error_code)
{
+0 −1
Original line number Diff line number Diff line
@@ -44,7 +44,6 @@
#include <asm/msr.h>

#include "mce-internal.h"
#include "mce.h"

/* Handle unconfigured int18 (should never happen) */
static void unexpected_machine_check(struct pt_regs *regs, long error_code)

arch/x86/kernel/cpu/mcheck/mce.h

deleted100644 → 0
+0 −38
Original line number Diff line number Diff line
#include <linux/init.h>
#include <asm/mce.h>

#ifdef CONFIG_X86_OLD_MCE
void amd_mcheck_init(struct cpuinfo_x86 *c);
void intel_p4_mcheck_init(struct cpuinfo_x86 *c);
void intel_p6_mcheck_init(struct cpuinfo_x86 *c);
#endif

#ifdef CONFIG_X86_ANCIENT_MCE
void intel_p5_mcheck_init(struct cpuinfo_x86 *c);
void winchip_mcheck_init(struct cpuinfo_x86 *c);
extern int mce_p5_enable;
static inline int mce_p5_enabled(void) { return mce_p5_enable; }
static inline void enable_p5_mce(void) { mce_p5_enable = 1; }
#else
static inline void intel_p5_mcheck_init(struct cpuinfo_x86 *c) {}
static inline void winchip_mcheck_init(struct cpuinfo_x86 *c) {}
static inline int mce_p5_enabled(void) { return 0; }
static inline void enable_p5_mce(void) { }
#endif

/* Call the installed machine check handler for this CPU setup. */
extern void (*machine_check_vector)(struct pt_regs *, long error_code);

#ifdef CONFIG_X86_OLD_MCE

extern int nr_mce_banks;

void intel_set_thermal_handler(void);

#else

static inline void intel_set_thermal_handler(void) { }

#endif

void intel_init_thermal(struct cpuinfo_x86 *c);
+1 −2
Original line number Diff line number Diff line
@@ -11,10 +11,9 @@
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/apic.h>
#include <asm/mce.h>
#include <asm/msr.h>

#include "mce.h"

void intel_init_thermal(struct cpuinfo_x86 *c)
{
	unsigned int cpu = smp_processor_id();
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