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Commit 9e53dd71 authored by Sergio Aguirre's avatar Sergio Aguirre Committed by paul
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OMAP3: clock: Camera module doesn't have IDLEST bit 



This patch avoids waiting for the camera module to become ready,
since it doesn't have IDLEST bit.

Based on a earlier hack done by Paul Walmsley on Sep 9 2008 on
linux-omap tree.

Signed-off-by: default avatarSergio Aguirre <saaguirre@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 15ca78f7

arch/arm/mach-omap2/clock34xx.h

+3 −3
Original line number Diff line number Diff line
@@ -2052,7 +2052,7 @@ static struct clk dss_ick = { 


static struct clk cam_mclk = {

	.name		= "cam_mclk",

	.ops		= &clkops_omap2_dflt_wait,

	.ops		= &clkops_omap2_dflt,

	.parent		= &dpll4_m5x2_ck,

	.enable_reg	= OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),

	.enable_bit	= OMAP3430_EN_CAM_SHIFT,
@@ -2063,7 +2063,7 @@ static struct clk cam_mclk = { 
static struct clk cam_ick = {

	/* Handles both L3 and L4 clocks */

	.name		= "cam_ick",

	.ops		= &clkops_omap2_dflt_wait,

	.ops		= &clkops_omap2_dflt,

	.parent		= &l4_ick,

	.init		= &omap2_init_clk_clkdm,

	.enable_reg	= OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
@@ -2074,7 +2074,7 @@ static struct clk cam_ick = { 


static struct clk csi2_96m_fck = {

	.name		= "csi2_96m_fck",

	.ops		= &clkops_omap2_dflt_wait,

	.ops		= &clkops_omap2_dflt,

	.parent		= &core_96m_fck,

	.init		= &omap2_init_clk_clkdm,

	.enable_reg	= OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),