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Commit 9e490f48 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

Merge branch 'omap-for-v3.13/n900' into omap-for-v3.13/board

parents 576e5bda d2065e2b

arch/arm/mach-omap2/board-rx51-peripherals.c

+19 −0
Original line number Diff line number Diff line
@@ -57,6 +57,8 @@ 
#include "common-board-devices.h"

#include "gpmc.h"

#include "gpmc-onenand.h"

#include "soc.h"

#include "omap-secure.h"



#define SYSTEM_REV_B_USES_VAUX3	0x1699

#define SYSTEM_REV_S_USES_VAUX3 0x8
@@ -1289,6 +1291,22 @@ static void __init rx51_init_twl4030_hwmon(void) 
	platform_device_register(&madc_hwmon);

}



static struct platform_device omap3_rom_rng_device = {

	.name		= "omap3-rom-rng",

	.id		= -1,

	.dev	= {

		.platform_data	= rx51_secure_rng_call,

	},

};



static void __init rx51_init_omap3_rom_rng(void)

{

	if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {

		pr_info("RX-51: Registring OMAP3 HWRNG device\n");

		platform_device_register(&omap3_rom_rng_device);

	}

}



void __init rx51_peripherals_init(void)

{

	rx51_i2c_init();
@@ -1309,5 +1327,6 @@ void __init rx51_peripherals_init(void) 


	rx51_charger_init();

	rx51_init_twl4030_hwmon();

	rx51_init_omap3_rom_rng();

}

arch/arm/mach-omap2/board-rx51.c

+12 −0
Original line number Diff line number Diff line
@@ -2,6 +2,8 @@ 
 * Board support file for Nokia N900 (aka RX-51).

 *

 * Copyright (C) 2007, 2008 Nokia

 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>

 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as
@@ -31,7 +33,9 @@ 
#include "mux.h"

#include "gpmc.h"

#include "pm.h"

#include "soc.h"

#include "sdram-nokia.h"

#include "omap-secure.h"



#define RX51_GPIO_SLEEP_IND 162
@@ -103,6 +107,14 @@ static void __init rx51_init(void) 
	usb_musb_init(&musb_board_data);

	rx51_peripherals_init();



	if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {

#ifdef CONFIG_ARM_ERRATA_430973

		pr_info("RX-51: Enabling ARM errata 430973 workaround\n");

		/* set IBE to 1 */

		rx51_secure_update_aux_cr(BIT(6), 0);

#endif

	}



	/* Ensure SDRC pins are mux'd for self-refresh */

	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);

	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);

arch/arm/mach-omap2/cclock3xxx_data.c

+1 −0
Original line number Diff line number Diff line
@@ -3275,6 +3275,7 @@ static struct omap_clk omap36xx_clks[] = { 
static struct omap_clk omap34xx_omap36xx_clks[] = {

	CLK(NULL,	"aes1_ick",	&aes1_ick),

	CLK("omap_rng",	"ick",		&rng_ick),

	CLK("omap3-rom-rng",	"ick",	&rng_ick),

	CLK(NULL,	"sha11_ick",	&sha11_ick),

	CLK(NULL,	"des1_ick",	&des1_ick),

	CLK(NULL,	"cam_mclk",	&cam_mclk),

arch/arm/mach-omap2/omap-secure.c

+76 −0
Original line number Diff line number Diff line
@@ -3,6 +3,8 @@ 
 *

 * Copyright (C) 2011 Texas Instruments, Inc.

 *	Santosh Shilimkar <santosh.shilimkar@ti.com>

 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>

 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>

 *

 *

 * This program is free software,you can redistribute it and/or modify
@@ -70,3 +72,77 @@ phys_addr_t omap_secure_ram_mempool_base(void) 
{

	return omap_secure_memblock_base;

}



/**

 * rx51_secure_dispatcher: Routine to dispatch secure PPA API calls

 * @idx: The PPA API index

 * @process: Process ID

 * @flag: The flag indicating criticality of operation

 * @nargs: Number of valid arguments out of four.

 * @arg1, arg2, arg3 args4: Parameters passed to secure API

 *

 * Return the non-zero error value on failure.

 *

 * NOTE: rx51_secure_dispatcher differs from omap_secure_dispatcher because

 *       it calling omap_smc3() instead omap_smc2() and param[0] is nargs+1

 */

u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,

			   u32 arg1, u32 arg2, u32 arg3, u32 arg4)

{

	u32 ret;

	u32 param[5];



	param[0] = nargs+1; /* RX-51 needs number of arguments + 1 */

	param[1] = arg1;

	param[2] = arg2;

	param[3] = arg3;

	param[4] = arg4;



	/*

	 * Secure API needs physical address

	 * pointer for the parameters

	 */

	local_irq_disable();

	local_fiq_disable();

	flush_cache_all();

	outer_clean_range(__pa(param), __pa(param + 5));

	ret = omap_smc3(idx, process, flag, __pa(param));

	flush_cache_all();

	local_fiq_enable();

	local_irq_enable();



	return ret;

}



/**

 * rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register

 *  @set_bits: bits to set in ACR

 *  @clr_bits: bits to clear in ACR

 *

 * Return the non-zero error value on failure.

*/

u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits)

{

	u32 acr;



	/* Read ACR */

	asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));

	acr &= ~clear_bits;

	acr |= set_bits;



	return rx51_secure_dispatcher(RX51_PPA_WRITE_ACR,

				      0,

				      FLAG_START_CRITICAL,

				      1, acr, 0, 0, 0);

}



/**

 * rx51_secure_rng_call: Routine for HW random generator

 */

u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag)

{

	return rx51_secure_dispatcher(RX51_PPA_HWRNG,

				      0,

				      NO_FLAG,

				      3, ptr, count, flag, 0);

}

arch/arm/mach-omap2/omap-secure.h

+13 −0
Original line number Diff line number Diff line
@@ -3,6 +3,8 @@ 
 *

 * Copyright (C) 2011 Texas Instruments, Inc.

 *	Santosh Shilimkar <santosh.shilimkar@ti.com>

 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>

 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as
@@ -46,14 +48,25 @@ 
#define OMAP4_PPA_L2_POR_INDEX		0x23

#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX	0x25



/* Secure RX-51 PPA (Primary Protected Application) APIs */

#define RX51_PPA_HWRNG			29

#define RX51_PPA_L2_INVAL		40

#define RX51_PPA_WRITE_ACR		42



#ifndef __ASSEMBLER__



extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,

				u32 arg1, u32 arg2, u32 arg3, u32 arg4);

extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);

extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);

extern phys_addr_t omap_secure_ram_mempool_base(void);

extern int omap_secure_ram_reserve_memblock(void);



extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,

				  u32 arg1, u32 arg2, u32 arg3, u32 arg4);

extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);

extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);



#ifdef CONFIG_OMAP4_ERRATA_I688

extern int omap_barrier_reserve_memblock(void);

#else