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Commit 9dbb0780 authored by Jeykumar Sankaran's avatar Jeykumar Sankaran Committed by Gerrit - the friendly Code Review server
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msm: mdss: parse and populate PPB offsets separately 



This change parses and populates PPB control and config register
offsets separately. Its not necessary every ping pong blocks
to have both control and config registers.

Change-Id: I4be0dcaa9fabbd81e4875255d808707bf1e97e8e
Signed-off-by: default avatarJeykumar Sankaran <jsanka@codeaurora.org>
parent 9befef11

Documentation/devicetree/bindings/fb/mdss-mdp.txt

+8 −2
Original line number Diff line number Diff line
@@ -496,7 +496,12 @@ Fudge Factors: Fudge factors are used to boost demand for 
				Offset is calculated from the "mdp_phys"

				register value. Mandatory when qcom,mdss-has-pingpong-split

				is enabled.

- qcom,mdss-ppb-off:		Array of offset addresses of ping pong buffer control registers.

- qcom,mdss-ppb-ctl-off:	Array of offset addresses of ping pong buffer control registers.

				The offsets are calculated from the "mdp_phys" base address

				specified. The number of offsets should match the

				number of ping pong buffers available in the hardware.

				Mandatory when qcom,mdss-has-pingpong-split is enabled.

- qcom,mdss-ppb-cfg-off:	Array of offset addresses of ping pong buffer config registers.

				The offsets are calculated from the "mdp_phys" base address

				specified. The number of offsets should match the

				number of ping pong buffers available in the hardware.
@@ -774,7 +779,8 @@ Example: 
		qcom,mdss-intf-off = <0x00021100 0x00021300

					   0x00021500 0x00021700>;

		qcom,mdss-cdm-off = <0x0007A200>;

		qcom,mdss-ppb-off = <0x0000420>;

		qcom,mdss-ppb-ctl-off = <0x0000420>;

		qcom,mdss-ppb-cfg-off = <0x0000424>;

		qcom,mdss-slave-pingpong-off = <0x00073000>



		/* buffer parameters to calculate prefill bandwidth */

drivers/video/msm/mdss/mdss.h

+4 −7
Original line number Diff line number Diff line
@@ -113,11 +113,6 @@ struct mdss_prefill_data { 
	struct simplified_prefill_factors prefill_factors;

};



struct mdss_mdp_ppb {

	u32 ctl_off;

	u32 cfg_off;

};



struct mdss_mdp_dsc {

	u32 num;

	char __iomem *base;
@@ -400,8 +395,10 @@ struct mdss_data_type { 
	u8  ncursor_pipes;

	u32 max_cursor_size;



	u32 nppb;

	struct mdss_mdp_ppb *ppb;

	u32 nppb_ctl;

	u32 *ppb_ctl;

	u32 nppb_cfg;

	u32 *ppb_cfg;

	char __iomem *slave_pingpong_base;



	struct mdss_mdp_mixer *mixer_intf;

drivers/video/msm/mdss/mdss_mdp.c

+21 −13
Original line number Diff line number Diff line
@@ -4049,24 +4049,32 @@ static int mdss_mdp_parse_dt_ppb_off(struct platform_device *pdev) 
	struct mdss_data_type *mdata = platform_get_drvdata(pdev);

	u32 len, index;

	const u32 *arr;

	arr = of_get_property(pdev->dev.of_node, "qcom,mdss-ppb-off", &len);

	arr = of_get_property(pdev->dev.of_node, "qcom,mdss-ppb-ctl-off", &len);

	if (arr) {

		mdata->nppb = len / sizeof(u32);

		mdata->ppb = devm_kzalloc(&mdata->pdev->dev,

				sizeof(struct mdss_mdp_ppb) *

				mdata->nppb, GFP_KERNEL);

		mdata->nppb_ctl = len / sizeof(u32);

		mdata->ppb_ctl = devm_kzalloc(&mdata->pdev->dev,

				sizeof(u32) * mdata->nppb_ctl, GFP_KERNEL);



		if (mdata->ppb == NULL)

		if (mdata->ppb_ctl == NULL)

			return -ENOMEM;



		for (index = 0; index <  mdata->nppb; index++) {

			mdata->ppb[index].ctl_off = be32_to_cpu(arr[index]);

			mdata->ppb[index].cfg_off =

				mdata->ppb[index].ctl_off + 4;

		for (index = 0; index <  mdata->nppb_ctl; index++)

			mdata->ppb_ctl[index] = be32_to_cpu(arr[index]);

	}

		return 0;



	arr = of_get_property(pdev->dev.of_node, "qcom,mdss-ppb-cfg-off", &len);

	if (arr) {

		mdata->nppb_cfg = len / sizeof(u32);

		mdata->ppb_cfg = devm_kzalloc(&mdata->pdev->dev,

				sizeof(u32) * mdata->nppb_cfg, GFP_KERNEL);



		if (mdata->ppb_cfg == NULL)

			return -ENOMEM;



		for (index = 0; index <  mdata->nppb_cfg; index++)

			mdata->ppb_cfg[index] = be32_to_cpu(arr[index]);

	}

	return -EINVAL;

	return 0;

}



#ifdef CONFIG_MSM_BUS_SCALING

drivers/video/msm/mdss/mdss_mdp_ctl.c

+6 −6
Original line number Diff line number Diff line
@@ -2731,7 +2731,7 @@ static void __dsc_setup_dual_lm_single_display(struct mdss_mdp_ctl *ctl, 
			/* left + right */

			pr_debug("full line (4 slices) or middle 2 slice partial update\n");

			writel_relaxed(0x0,

				mdata->mdp_base + mdata->ppb[0].ctl_off);

				mdata->mdp_base + mdata->ppb_ctl[0]);

			writel_relaxed(0x0,

				mdata->mdp_base + MDSS_MDP_REG_DCE_SEL);

		} else if (valid_l || valid_r) {
@@ -2746,13 +2746,13 @@ static void __dsc_setup_dual_lm_single_display(struct mdss_mdp_ctl *ctl, 
				valid_l = true;



				writel_relaxed(0x2 << 4, mdata->mdp_base +

					mdata->ppb[0].ctl_off);

					mdata->ppb_ctl[0]);

				writel_relaxed(BIT(0),

					mdata->mdp_base + MDSS_MDP_REG_DCE_SEL);

			} else {

				pr_debug("only one slice partial update\n");

				writel_relaxed(0x0, mdata->mdp_base +

					mdata->ppb[0].ctl_off);

					mdata->ppb_ctl[0]);

				writel_relaxed(0x0, mdata->mdp_base +

					MDSS_MDP_REG_DCE_SEL);

			}
@@ -3486,7 +3486,7 @@ static void mdss_mdp_ctl_pp_split_display_enable(bool enable, 
{

	u32 cfg = 0, cntl = 0;



	if (ctl->mdata->nppb == 0) {

	if (!ctl->mdata->nppb_ctl || !ctl->mdata->nppb_cfg) {

		pr_err("No PPB to enable PP split\n");

		BUG();

	}
@@ -3499,8 +3499,8 @@ static void mdss_mdp_ctl_pp_split_display_enable(bool enable, 
		cntl = BIT(5);			 /* enable dst split */

	}



	writel_relaxed(cfg, ctl->mdata->mdp_base + ctl->mdata->ppb[0].cfg_off);

	writel_relaxed(cntl, ctl->mdata->mdp_base + ctl->mdata->ppb[0].ctl_off);

	writel_relaxed(cfg, ctl->mdata->mdp_base + ctl->mdata->ppb_cfg[0]);

	writel_relaxed(cntl, ctl->mdata->mdp_base + ctl->mdata->ppb_ctl[0]);

}



int mdss_mdp_ctl_destroy(struct mdss_mdp_ctl *ctl)