Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9d72af6e authored by Arnaud Patard's avatar Arnaud Patard Committed by Sascha Hauer
Browse files

efikamx: add usb h1 support



Now that usb has been fixed, we can enable usb h1 on efikamx

Signed-off-by: default avatarArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent 7ac18a38
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -119,6 +119,7 @@ config MX51_EFIKA_COMMON
	select IMX_HAVE_PLATFORM_IMX_UART
	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
	select IMX_HAVE_PLATFORM_SPI_IMX
	select MXC_ULPI if USB_ULPI

config MACH_MX51_EFIKAMX
	bool "Support MX51 Genesi Efika MX nettop"
+14 −0
Original line number Diff line number Diff line
@@ -211,6 +211,20 @@ static void __init mx51_efikamx_init(void)
		gpio_request(EFIKAMX_RESET, "reset");
		gpio_direction_output(EFIKAMX_RESET, 1);
	}

	/*
	 * enable wifi by default only on mx
	 * sb and mx have same wlan pin but the value to enable it are
	 * different :/
	 */
	gpio_request(EFIKA_WLAN_EN, "wlan_en");
	gpio_direction_output(EFIKA_WLAN_EN, 0);
	msleep(10);

	gpio_request(EFIKA_WLAN_RESET, "wlan_rst");
	gpio_direction_output(EFIKA_WLAN_RESET, 0);
	msleep(10);
	gpio_set_value(EFIKA_WLAN_RESET, 1);
}

static void __init mx51_efikamx_timer_init(void)
+4 −0
Original line number Diff line number Diff line
#ifndef _EFIKA_H
#define _EFIKA_H

#define EFIKA_WLAN_EN		IMX_GPIO_NR(2, 16)
#define EFIKA_WLAN_RESET	IMX_GPIO_NR(2, 10)
#define EFIKA_USB_PHY_RESET	IMX_GPIO_NR(2, 9)

void __init efika_board_common_init(void);

#endif
+103 −4
Original line number Diff line number Diff line
@@ -30,6 +30,10 @@
#include <mach/i2c.h>
#include <mach/mxc_ehci.h>

#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <mach/ulpi.h>

#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
@@ -40,7 +44,12 @@
#include "devices.h"
#include "efika.h"

#define	MX51_USB_PLL_DIV_24_MHZ	0x01
#define MX51_USB_CTRL_1_OFFSET          0x10
#define MX51_USB_CTRL_UH1_EXT_CLK_EN    (1 << 25)
#define	MX51_USB_PLL_DIV_19_2_MHZ	0x01

#define EFIKAMX_USB_HUB_RESET	IMX_GPIO_NR(1, 5)
#define EFIKAMX_USBH1_STP	IMX_GPIO_NR(1, 27)

#define EFIKAMX_SPI_CS0		IMX_GPIO_NR(4, 24)
#define EFIKAMX_SPI_CS1		IMX_GPIO_NR(4, 25)
@@ -81,6 +90,29 @@ static iomux_v3_cfg_t mx51efika_pads[] = {
	MX51_PAD_CSPI1_SS1__GPIO4_25,
	MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
	MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,

	/* USB HOST1 */
	MX51_PAD_USBH1_CLK__USBH1_CLK,
	MX51_PAD_USBH1_DIR__USBH1_DIR,
	MX51_PAD_USBH1_NXT__USBH1_NXT,
	MX51_PAD_USBH1_DATA0__USBH1_DATA0,
	MX51_PAD_USBH1_DATA1__USBH1_DATA1,
	MX51_PAD_USBH1_DATA2__USBH1_DATA2,
	MX51_PAD_USBH1_DATA3__USBH1_DATA3,
	MX51_PAD_USBH1_DATA4__USBH1_DATA4,
	MX51_PAD_USBH1_DATA5__USBH1_DATA5,
	MX51_PAD_USBH1_DATA6__USBH1_DATA6,
	MX51_PAD_USBH1_DATA7__USBH1_DATA7,

	/* USB HUB RESET */
	MX51_PAD_GPIO1_5__GPIO1_5,

	/* WLAN */
	MX51_PAD_EIM_A22__GPIO2_16,
	MX51_PAD_EIM_A16__GPIO2_10,

	/* USB PHY RESET */
	MX51_PAD_EIM_D27__GPIO2_9,
};

/* Serial ports */
@@ -105,13 +137,13 @@ static int initialize_otg_port(struct platform_device *pdev)
	/* Set the PHY clock to 19.2MHz */
	v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
	v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
	v |= MX51_USB_PLL_DIV_24_MHZ;
	v |= MX51_USB_PLL_DIV_19_2_MHZ;
	__raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
	iounmap(usb_base);

	mdelay(10);

	return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
	return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
}

static struct mxc_usbh_platform_data dr_utmi_config = {
@@ -119,6 +151,73 @@ static struct mxc_usbh_platform_data dr_utmi_config = {
	.portsc = MXC_EHCI_UTMI_16BIT,
};

static int initialize_usbh1_port(struct platform_device *pdev)
{
	iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
	iomux_v3_cfg_t usbh1gpio = MX51_PAD_USBH1_STP__GPIO1_27;
	u32 v;
	void __iomem *usb_base;
	void __iomem *socregs_base;

	mxc_iomux_v3_setup_pad(usbh1gpio);
	gpio_request(EFIKAMX_USBH1_STP, "usbh1_stp");
	gpio_direction_output(EFIKAMX_USBH1_STP, 0);
	msleep(1);
	gpio_set_value(EFIKAMX_USBH1_STP, 1);
	msleep(1);

	usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
	socregs_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);

	/* The clock for the USBH1 ULPI port will come externally */
	/* from the PHY. */
	v = __raw_readl(socregs_base + MX51_USB_CTRL_1_OFFSET);
	__raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN,
			socregs_base + MX51_USB_CTRL_1_OFFSET);

	iounmap(usb_base);

	gpio_free(EFIKAMX_USBH1_STP);
	mxc_iomux_v3_setup_pad(usbh1stp);

	mdelay(10);

	return mx51_initialize_usb_hw(0, MXC_EHCI_ITC_NO_THRESHOLD);
}

static struct mxc_usbh_platform_data usbh1_config = {
	.init   = initialize_usbh1_port,
	.portsc = MXC_EHCI_MODE_ULPI,
};

static void mx51_efika_hubreset(void)
{
	gpio_request(EFIKAMX_USB_HUB_RESET, "usb_hub_rst");
	gpio_direction_output(EFIKAMX_USB_HUB_RESET, 1);
	msleep(1);
	gpio_set_value(EFIKAMX_USB_HUB_RESET, 0);
	msleep(1);
	gpio_set_value(EFIKAMX_USB_HUB_RESET, 1);
}

static void __init mx51_efika_usb(void)
{
	mx51_efika_hubreset();

	/* pulling it low, means no USB at all... */
	gpio_request(EFIKA_USB_PHY_RESET, "usb_phy_reset");
	gpio_direction_output(EFIKA_USB_PHY_RESET, 0);
	msleep(1);
	gpio_set_value(EFIKA_USB_PHY_RESET, 1);

	usbh1_config.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
				ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT |
				ULPI_OTG_EXTVBUSIND);

	mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
	mxc_register_device(&mxc_usbh1_device, &usbh1_config);
}

static struct mtd_partition mx51_efika_spi_nor_partitions[] = {
	{
	 .name = "u-boot",
@@ -164,8 +263,8 @@ void __init efika_board_common_init(void)
{
	mxc_iomux_v3_setup_multiple_pads(mx51efika_pads,
					ARRAY_SIZE(mx51efika_pads));
	mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
	imx51_add_imx_uart(0, &uart_pdata);
	mx51_efika_usb();
	imx51_add_sdhci_esdhc_imx(0, NULL);

	spi_register_board_info(mx51_efika_spi_board_info,