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Commit 9ca163c8 authored by Kyle Moffett's avatar Kyle Moffett Committed by Benjamin Herrenschmidt
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fsl/mpic: Create and document the "single-cpu-affinity" device-tree flag



The Freescale MPIC (and perhaps others in the future) is incapable of
routing non-IPI interrupts to more than once CPU at a time.  Currently
all of the Freescale boards msut pass the MPIC_SINGLE_DEST_CPU flag to
mpic_alloc(), but that information should really be present in the
device-tree.

Older board code can't rely on the device-tree having the property set,
but newer platforms won't need it manually specified in the code.

[BenH: Remove unrelated changes, folded in a different patch]

Signed-off-by: default avatarKyle Moffett <Kyle.D.Moffett@boeing.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 98cca250
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+6 −0
Original line number Diff line number Diff line
@@ -64,6 +64,12 @@ PROPERTIES
          device-trees omit this property on MPIC nodes even when the MPIC is
          in fact big-endian, so certain boards override this property.

  - single-cpu-affinity
      Usage: optional
      Value type: <empty>
          If present the MPIC will be assumed to only be able to route
          non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC).

INTERRUPT SPECIFIER DEFINITION

  Interrupt specifiers consists of 4 cells encoded as
+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ mpic: pic@40000 {
	compatible = "fsl,mpic";
	device_type = "open-pic";
	big-endian;
	single-cpu-affinity;
};

timer@41100 {
+2 −0
Original line number Diff line number Diff line
@@ -1187,6 +1187,8 @@ struct mpic * __init mpic_alloc(struct device_node *node,
		flags |= MPIC_BIG_ENDIAN;
	if (of_get_property(node, "pic-no-reset", NULL))
		flags |= MPIC_NO_RESET;
	if (of_get_property(node, "single-cpu-affinity", NULL))
		flags |= MPIC_SINGLE_DEST_CPU;
	if (of_device_is_compatible(node, "fsl,mpic"))
		flags |= MPIC_FSL;